Method of flattening the surface of a semiconductor device by polishing

Claim 1

A method of manufacturing a semiconductor memory, comprising: a step of forming a BPSG film over a semiconductor substrate having a memory cell area in which stacked capacitor cells are concentrated and over another perimetric circuit area in which said stacked capacitor cells are not concentrated, said BPSG film being formed to a greater height than said memory cell area; a step of reflowing the BPSG film; a step of covering all areas of the BPSG film other than those overlying the memory cell area with a deposited protective film which is lower in polishing rate than the BPSG film, said deposited protective film being thinner than a thickness of the stacked capacitor cells; a step of polishing the surface of the BPSG film through the use of colloidal silica slurry; and a step of removing said deposited protective film after said polishing step.

Claim 2

A method of manufacturing a semiconductor memory, comprising: a step of forming a BPSG film over a semiconductor substrate having a memory cell area in which stacked capacitor cells are concentrated and over another perimetric circuit area in which said stacked capacitor cells are not concentrated, said BPSG film being formed to a greater height than said memory cell area; a step of reflowing the BPSG film; a step of covering all areas of the BPSG film other than those overlying the memory cell area with a deposited protective film which is lower in polishing rate than the BPSG film, said deposited protective film being thinner than a thickness of the stacked capacitor cells; a step of polishing the surface of the BPSG film through the use of colloidal silica slurry; and a step of removing said deposited protective film after said polishing step.

Claim 4

A method of manufacturing a semiconductor device comprising the steps of: covering a semiconductor substrate having a convex pattern with an insulating layer, said insulating layer thereby having a surface including a convex portion formed to a greater height than said convex pattern and perimetric concave portions around said convex portion; forming a protection insulating film on said convex and perimetric portions; selectively removing said protection insulating film from said convex portion; selectively removing, by polishing, said insulating layer from said convex portion; and removing said protection insulating film from said perimetric portions.

Claim 5

A method of manufacturing a semiconductor device comprising the steps of: covering a semiconductor substrate having a convex pattern with an insulating layer, said insulating layer thereby having a surface including a convex portion formed to a greater height than said convex pattern and perimetric concave portions around said convex portion; forming a protection insulating film on said convex and perimetric portions; selectively removing said protection insulating film from said convex portion; selectively removing, by polishing, said insulating layer from said convex portion; and removing said protection insulating film from said perimetric portions.

Claim 10

A method of manufacturing a semiconductor device comprising the steps of: covering a semiconductor substrate having a convex pattern with an insulating layer formed to a greater height than said convex pattern, said insulating layer thereby having a surface including a convex portion and perimetric concave portions around said convex portion; depositing, by a CVD method, a protection insulating film on a surface of said insulating layer covered convex and perimetric portions; selectively removing said protection insulating film from said convex portion; selectively removing, by polishing, said insulating layer from said convex portion; and removing said protection insulating film from said perimetric portions, a deposition of said protection insulating film by said CVD method thereby allowing a precise control of a thickness of said protection insulating film on said insulating layer.

Claim 11

A method of manufacturing a semiconductor device comprising the steps of: covering a semiconductor substrate having a convex pattern with an insulating layer formed to a greater height than said convex pattern, said insulating layer thereby having a surface including a convex portion and perimetric concave portions around said convex portion; depositing, by a CVD method, a protection insulating film on a surface of said insulating layer covered convex and perimetric portions; selectively removing said protection insulating film from said convex portion; selectively removing, by polishing, said insulating layer from said convex portion; and removing said protection insulating film from said perimetric portions, a deposition of said protection insulating film by said CVD method thereby allowing a precise control of a thickness of said protection insulating film on said insulating layer.