US5314843A
Expired / Lapsed
US
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Integrated circuit polishing method
Assignee: Round Rock Research LLC
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Filing: 1992-03-27
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Granted: 1994-05-24
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Expires: 2012-03-27
Abstract
Abstract A semiconductor wafer has a surface layer to be planarized in a chemical mechanical polishing (CMP) process. An area of the layer that is higher than another area is altered so that the removal rate is higher. For example, if the surface layer is TEOS oxide, the higher layer may be bombarded with boron and phosphorus to produce BPSG, which has a polishing rate 2-3 times that of the TEOS. Upon CMP planarization, the higher area erodes faster resulting in improved planarization. Alternatively, the lower area may be doped with nitrogen to produce a nitride which is more resistant to CMP, with the same result. Likewise areas, such as tungsten troughs, which tend to be dished by CMP, may be changed to WNx which is more resistant to the tungsten CMP than the adjacent tungsten, eliminating the dishing upon planarization.
Inventors
- 👤 Chris C. Yu
- 👤 Gurtej S. Sandhu
- 👤 Trung T. Doan
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 18:18
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/062; H10P; H10P95/00; H10P95/06; H10P95/062
Claims Analysis
Total Claims: 29
Claim 1
Independent Claim
93 words
A method of fabrication of an integrated circuit, said method comprising the steps of: providing a semiconductor wafer having a surface layer of a material to be planarized in a chemical mechanical polishing process; masking said surface layer to define first and second laterally adjacent portions of said surface layer; altering only said first portion of said surface layer of material to polish at a different removal rate in the chemical mechanical polishing process than said second portion of said surface layer; and polishing said surface layer in said chemical mechanical polishing process.
Claim 2
Independent Claim
93 words
A method of fabrication of an integrated circuit, said method comprising the steps of: providing a semiconductor wafer having a surface layer of a material to be planarized in a chemical mechanical polishing process; masking said surface layer to define first and second laterally adjacent portions of said surface layer; altering only said first portion of said surface layer of material to polish at a different removal rate in the chemical mechanical polishing process than said second portion of said surface layer; and polishing said surface layer in said chemical mechanical polishing process.
Claim 3
Dependent Claim
22 words
A method as in claim 1 wherein said step of altering comprises adding an impurity to said first portion of said material.
Claim 4
Dependent Claim
20 words
A method as in claim 2 wherein said step of altering comprises chemically altering said first portion of said material.
Claim 5
Independent Claim
107 words
A method of fabrication of an integrated circuit, said method comprising the steps of: providing a semiconductor wafer having a surface layer of a first material to be planarized in a chemical mechanical polishing process, said first material having a first polish rate in the chemical mechanical polishing process; masking the surface layer to expose only a portion of the surface layer; altering said exposed portion of said surface layer of said first material to create a second material which has a second removal rate in the chemical mechanical polishing process different than said first material; and polishing said surface layer in the chemical mechanical polishing process.
Claim 6
Independent Claim
107 words
A method of fabrication of an integrated circuit, said method comprising the steps of: providing a semiconductor wafer having a surface layer of a first material to be planarized in a chemical mechanical polishing process, said first material having a first polish rate in the chemical mechanical polishing process; masking the surface layer to expose only a portion of the surface layer; altering said exposed portion of said surface layer of said first material to create a second material which has a second removal rate in the chemical mechanical polishing process different than said first material; and polishing said surface layer in the chemical mechanical polishing process.
Claim 7
Dependent Claim
18 words
A method as in claim 4 wherein said step of polishing comprises removing all of said second material.
Claim 8
Independent Claim
86 words
A method of fabrication of an integrated circuit, said method comprising the steps of: providing a semiconductor wafer having a surface layer of a first material to be planarized in a chemical mechanical polishing process; altering a portion of said surface layer of material to create a second material which responds differently to the chemical mechanical polishing process than said first material wherein said step of altering comprises doping selected portions of said first material; and polishing said surface layer in a chemical mechanical polishing process.
Claim 9
Independent Claim
86 words
A method of fabrication of an integrated circuit, said method comprising the steps of: providing a semiconductor wafer having a surface layer of a first material to be planarized in a chemical mechanical polishing process; altering a portion of said surface layer of material to create a second material which responds differently to the chemical mechanical polishing process than said first material wherein said step of altering comprises doping selected portions of said first material; and polishing said surface layer in a chemical mechanical polishing process.
Claim 10
Dependent Claim
14 words
A method as in claim 6 wherein said step of doping comprises ion implantation.
Claim 11
Dependent Claim
13 words
A method as in claim 4 wherein said first material is silicon dioxide.
Claim 12
Dependent Claim
25 words
A method as in claim 6 wherein said step of doping comprises doping with boron or phosphorous and said second material is doped silicon oxide.
Claim 13
Dependent Claim
24 words
A method as in claim 9 wherein said step of doping comprises adding between 1% and 4% Boron and between 5% and 8% phosphorus.
Claim 14
Dependent Claim
15 words
A method as in claim 6 wherein said step of doping comprises doping with nitrogen.
Claim 15
Independent Claim
129 words
A method of fabrication of an integrated circuit, said method comprising the steps of: providing a semiconductor wafer having a surface layer of a first material to be planarized in a chemical mechanical polishing process, said first material having a first polish rate in the chemical mechanical polishing process; altering a portion of said surface layer of said first material to create a second material which has a second removal rate in the chemical mechanical polishing process different than said first material wherein said step of altering comprises the steps of: (i) masking said layer of material; (ii) exposing said masked area of material to a modification process to modify selected areas of said layer of material; and (iii) polishing said surface layer in the chemical mechanical polishing process.
Claim 16
Independent Claim
129 words
A method of fabrication of an integrated circuit, said method comprising the steps of: providing a semiconductor wafer having a surface layer of a first material to be planarized in a chemical mechanical polishing process, said first material having a first polish rate in the chemical mechanical polishing process; altering a portion of said surface layer of said first material to create a second material which has a second removal rate in the chemical mechanical polishing process different than said first material wherein said step of altering comprises the steps of: (i) masking said layer of material; (ii) exposing said masked area of material to a modification process to modify selected areas of said layer of material; and (iii) polishing said surface layer in the chemical mechanical polishing process.
Claim 17
Dependent Claim
19 words
A method as in claim 12 wherein said material is silicon dioxide and said modification process comprises ion implantation.
Claim 18
Dependent Claim
21 words
A method as in claim 12 wherein said first material is tungsten and said modification process comprises immersion in a plasma.
Claim 19
Dependent Claim
13 words
A method as in claim 14 wherein said second material is tungsten nitride.
Claim 20
Dependent Claim
15 words
A method as in claim 14 wherein said second material is an oxide of tungsten.
Claim 21
Dependent Claim
12 words
A method as in claim 12 wherein said first material is silicon.
Claim 22
Dependent Claim
13 words
A method as in claim 17 wherein said second material is silicon nitride.
Claim 23
Dependent Claim
15 words
A method as in claim 17 wherein said second material is an oxide of silicon.
Claim 24
Independent Claim
107 words
A method of fabrication of an integrated circuit, said method comprising the steps of: providing a semiconductor wafer having a surface layer of a first material to be planarized in a chemical mechanical polishing process; masking the surface layer to expose only a portion of the surface layer; altering said exposed portion of said surface layer of material above a wafer trough to create a region of a second material more resistant to the chemical mechanical polishing process than said first material; and polishing said surface layer in the chemical mechanical polishing process until all of said second material is removed and said first material is planarized.
Claim 25
Independent Claim
107 words
A method of fabrication of an integrated circuit, said method comprising the steps of: providing a semiconductor wafer having a surface layer of a first material to be planarized in a chemical mechanical polishing process; masking the surface layer to expose only a portion of the surface layer; altering said exposed portion of said surface layer of material above a wafer trough to create a region of a second material more resistant to the chemical mechanical polishing process than said first material; and polishing said surface layer in the chemical mechanical polishing process until all of said second material is removed and said first material is planarized.
Claim 26
Dependent Claim
19 words
A method as in claim 20 wherein said first material is tungsten and said second material is tungsten nitride.
Claim 27
Independent Claim
135 words
A method of fabrication of an integrated circuit, said method comprising the steps of: providing a semiconductor wafer having a surface layer of a first material to be planarized in a chemical mechanical polishing process, the surface layer having an upper surface; altering a portion of said surface layer of material at either side of a trough to create a region of a second material less resistant to the chemical mechanical polishing process than said first material while leaving a portion of said surface layer over said trough unaltered, wherein the upper surface includes a region of said unaltered first material and said region of said second material; and polishing said surface layer in the chemical mechanical polishing process until all of said region of second material is removed and said first material is planarized.
Claim 28
Independent Claim
135 words
A method of fabrication of an integrated circuit, said method comprising the steps of: providing a semiconductor wafer having a surface layer of a first material to be planarized in a chemical mechanical polishing process, the surface layer having an upper surface; altering a portion of said surface layer of material at either side of a trough to create a region of a second material less resistant to the chemical mechanical polishing process than said first material while leaving a portion of said surface layer over said trough unaltered, wherein the upper surface includes a region of said unaltered first material and said region of said second material; and polishing said surface layer in the chemical mechanical polishing process until all of said region of second material is removed and said first material is planarized.
Claim 29
Dependent Claim
19 words
A method as in claim 22 wherein said first material is tungsten and said second material is tungsten oxide.
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