Patent US4078254A successfully refreshed from Google Patents.
← Back to Patent Explorer
US4078254A Expired / Lapsed US ⏱️ 0.0 years remaining

Hierarchical memory with dedicated high speed buffers

Assignee: International Business Machines Corp
•
Filing: 1973-12-26
•
Granted: 1978-03-07
•
Expires: 1993-12-26
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A hierarchical memory for a data processing system which is comprised of a number of different independent storage modules and a main memory backing store. Each data handling element of the system has an independent storage module associated with it as a dedicated buffer. A larger high speed main storage is used as a backing store. Each data handling element presumes that any data it needs is located in its dedicated buffer. If the data is not in the dedicated buffer, the data handling element scans all the other buffers until the desired data is located.

Inventors

  • 👤 William F. Beausoleil
  • 👤 Byron E. Phelps

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-22 23:32
CPC Classifications
G; G06; G06F; G06F12/00; G06F12/02; G06F12/08; G06F12/0802; G06F12/0806; G06F12/0811; G06F15/00; G06F15/16

Claims Analysis

Total Claims: 15
Claim 1
Independent Claim 177 words
For use with a data processing system, a hierarchical memory comprising: a backing store having data units stored therein at memory addresses; a first buffer dedicated to a first user of said hierarchical memory; a second buffer dedicated to a second user of said hierarchical memory; bus/gating means interconnecting said first user, said second user, said first buffer, said second buffer, and said backing store; means responsive to a request for a data unit from said first user for searching said first buffer for said data unit and for controlling said bus/gating means to thereby transfer said data unit between said first buffer and said first user upon the condition that said data unit resides in said first buffer, and means for searching said second buffer for said data unit upon the condition that said requested data unit is not found in said first buffer and for controlling said bus/gating means to thereby transfer said data unit between said second buffer and said first user upon the condition that said data unit resides in said second buffer.
Claim 2
Dependent Claim 177 words
For use with a data processing system, a hierarchical memory comprising: a backing store having data units stored therein at memory addresses; a first buffer dedicated to a first user of said hierarchical memory; a second buffer dedicated to a second user of said hierarchical memory; bus/gating means interconnecting said first user, said second user, said first buffer, said second buffer, and said backing store; means responsive to a request for a data unit from said first user for searching said first buffer for said data unit and for controlling said bus/gating means to thereby transfer said data unit between said first buffer and said first user upon the condition that said data unit resides in said first buffer, and means for searching said second buffer for said data unit upon the condition that said requested data unit is not found in said first buffer and for controlling said bus/gating means to thereby transfer said data unit between said second buffer and said first user upon the condition that said data unit resides in said second buffer.
Claim 3
Dependent Claim 35 words
The combination according to claim 1 further comprising means for searching said backing store for said data unit upon the condition that said data unit is not found in said first or said second buffer.
Claim 4
Independent Claim 118 words
The method of searching a hierarchical memory which comprises a backing store, a first buffer dedicated to a first user of said hierarchical memory, and a second buffer dedicated to a second user of said hierarchical memory, comprising the steps of: searching the dedicated buffer of said first user for a data unit requested by said user; searching the dedicated buffer of said second user upon the condition that the requested data unit does not reside in the dedicated buffer of said first user; and accessing the data unit at said second dedicated buffer upon the condition that said data unit is found in said second buffer without alteration of the use code of said first dedicated buffer.
Claim 5
Independent Claim 118 words
The method of searching a hierarchical memory which comprises a backing store, a first buffer dedicated to a first user of said hierarchical memory, and a second buffer dedicated to a second user of said hierarchical memory, comprising the steps of: searching the dedicated buffer of said first user for a data unit requested by said user; searching the dedicated buffer of said second user upon the condition that the requested data unit does not reside in the dedicated buffer of said first user; and accessing the data unit at said second dedicated buffer upon the condition that said data unit is found in said second buffer without alteration of the use code of said first dedicated buffer.
Claim 6
Dependent Claim 90 words
The method according to claim 3 comprising the further step of transferring the least recently used data unit from said first user's dedicated buffer to its appropriate location in said backing store upon the condition that the requested data unit is not found in either of said dedicated buffers, to thereby vacate a location in said buffer, and transferring the requested data unit from said backing store to said first user and to first dedicated buffer to be stored in its address in said location vacated in said dedicated buffer.
Claim 7
Dependent Claim 182 words
For use with a data processing system, a hierarchical memory comprising: a backing store having data units stored therein at memory addresses; a first buffer dedicated to a first user of said hierarchical memory, said buffer including use logic for assigning a use code to each data unit stored in said buffer; a second buffer dedicated to a second user of said hierarchical memory; bus/gating means interconnecting said first user, said second user, said first buffer, said second buffer, and said backing store; control means responsive to a request for a data unit from said first user for searching said first dedicated buffer for said data unit and for controlling said bus/gating means to thereby transfer said data unit between said buffer and said first user upon the condition that said data unit resides in said first buffer, and means at said buffer for updating said use code assigned to said data unit upon each transfer; and means for searching said second buffer for said data unit upon the condition that said requested data unit is not found in said first buffer.
Claim 8
Dependent Claim 182 words
For use with a data processing system, a hierarchical memory comprising: a backing store having data units stored therein at memory addresses; a first buffer dedicated to a first user of said hierarchical memory, said buffer including use logic for assigning a use code to each data unit stored in said buffer; a second buffer dedicated to a second user of said hierarchical memory; bus/gating means interconnecting said first user, said second user, said first buffer, said second buffer, and said backing store; control means responsive to a request for a data unit from said first user for searching said first dedicated buffer for said data unit and for controlling said bus/gating means to thereby transfer said data unit between said buffer and said first user upon the condition that said data unit resides in said first buffer, and means at said buffer for updating said use code assigned to said data unit upon each transfer; and means for searching said second buffer for said data unit upon the condition that said requested data unit is not found in said first buffer.
Claim 9
Dependent Claim 35 words
The combination according to claim 5 further comprising means for searching said backing store for said data unit upon the condition that said data unit is not found in said first or said second buffer.
Claim 10
Dependent Claim 155 words
For use with a data processing system, a hierarchical memory comprising: a slow speed backing store having data units stored therein at memory addresses; a first high speed buffer dedicated to a first user of said hierarchical memory; a second high speed buffer dedicated to a second user of said hierarchical memory; bus/gating means interconnecting said first user, said second user, said first high speed buffer, said second high speed buffer, and said backing store; means responsive to a request for a data unit from said first user for searching said first dedicated buffer for said data unit and for controlling said bus/gating means to thereby transfer said data unit between said buffer and said first user upon the condition that said data unit resides in said first buffer, and means for searching said second buffer for said data unit upon the condition that said requested data unit is not found in said first buffer.
Claim 11
Dependent Claim 155 words
For use with a data processing system, a hierarchical memory comprising: a slow speed backing store having data units stored therein at memory addresses; a first high speed buffer dedicated to a first user of said hierarchical memory; a second high speed buffer dedicated to a second user of said hierarchical memory; bus/gating means interconnecting said first user, said second user, said first high speed buffer, said second high speed buffer, and said backing store; means responsive to a request for a data unit from said first user for searching said first dedicated buffer for said data unit and for controlling said bus/gating means to thereby transfer said data unit between said buffer and said first user upon the condition that said data unit resides in said first buffer, and means for searching said second buffer for said data unit upon the condition that said requested data unit is not found in said first buffer.
Claim 12
Dependent Claim 35 words
The combination according to claim 7 further comprising means for searching said backing store for said data unit upon the condition that said data unit is not found in said first or said second buffer.
Claim 13
Dependent Claim 192 words
For use with a data processing system, a hierarchical memory comprising: a slow speed backing store having data units stored therein at memory addresses; a first high speed buffer dedicated to a first user of said hierarchical memory said buffer including use logic for assigning a use code to each data unit stored in said buffer; a second high speed buffer dedicated to a second user of said hierarchical memory; bus/gating means interconnecting said first user, said second user, said first high speed buffer, said second high speed buffer, and said backing store; control means responsive to a request for a data unit from said first user for searching said first dedicated buffer for said data unit and for controlling said bus/gating means to thereby transfer said data unit between said buffer and said first user upon the condition that said data unit resides in said first buffer, and means at said buffer for updating said use code assigned to said data unit upon each transfer; and means for searchng said second buffer for said data unit upon the condition that said requested data unit is not found in said first buffer.
Claim 14
Dependent Claim 192 words
For use with a data processing system, a hierarchical memory comprising: a slow speed backing store having data units stored therein at memory addresses; a first high speed buffer dedicated to a first user of said hierarchical memory said buffer including use logic for assigning a use code to each data unit stored in said buffer; a second high speed buffer dedicated to a second user of said hierarchical memory; bus/gating means interconnecting said first user, said second user, said first high speed buffer, said second high speed buffer, and said backing store; control means responsive to a request for a data unit from said first user for searching said first dedicated buffer for said data unit and for controlling said bus/gating means to thereby transfer said data unit between said buffer and said first user upon the condition that said data unit resides in said first buffer, and means at said buffer for updating said use code assigned to said data unit upon each transfer; and means for searchng said second buffer for said data unit upon the condition that said requested data unit is not found in said first buffer.
Claim 15
Dependent Claim 35 words
The combination according to claim 9 further comprising means for searching said backing store for said data unit upon the condition that said data unit is not found in said first or said second buffer.

References Cited (Backward Citations)

US3569938A Cited
US3618040A Cited
US3581291A Cited
US3618041A Cited
US3588839A Cited
US3685020A Cited
US3693165A Cited
US3786427A Cited
US3735360A Cited
US3771137A Cited
US3889237A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1981-03-06 1981-09-05 1982-03-07 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1985-03-06 1985-09-05 1986-03-07 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1989-03-06 1989-09-05 1990-03-07 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag