Hierarchical memory updating system
Abstract
Abstract A COMPUTER MEMORY SYSTEM IN WHICH THE DATA IS TRANSFERRED BETWEEN HIGH-SPEED LOCAL STORAGE AND ONE OR MORE LEVELS OF A LARGER LOW SPEED STORAGE WHEREIN ALTERED DATA IS REWRITTEN IN HIGH-SPEED STORAGE IMMEDIATELY AND IN THE LOWSPEED STORAGE ON A CYCLE STEALING BASIS. CONTROLS ARE PROVIDED SO THAT WHEN A SMALL SEGMENT OF DATA IN A PARTICULAR BLOCK OR PAGE IN HIGH-SPEED STORE IS ALTERED AND INDICATOR IS SET. WHEN MEMORY BUSS TIME IS AVAILABLE TO THE LOW SPEED OR BACKUP STORE THESE INDICATORS WILL BE CHECKED AND WORDS OR LINES REWRITTEN IN SAID BACKUP STORE AS LONG AS A HIGHER PRIORITY JOB IS NOT ENCOUNTERED. WHEN IT IS DESIRED TO REPLACE A COMPLETE PAGE IN HIGH-SPEED STORAGE, INDICATORS FOR THAT PAGE ARE CHECKED AND ALL ALTERED WORDS ARE REWRITTEN IMMEDIATEDLY IN THE BACKUP STORE ON A HIGH PRIORITY BASIS AFTER WHICH THE PAGE IN THE HIGH-SPEED STORE MAY BE OVERWRITTER WITH NEW DATA FROM THE BACKUP STORE.
Inventors
- 👤 Laszlo A Belady
- 👤 Carl J Kuehner
- 👤 Meir M Lehman
- 👤 Brian Randell
Bibliographic Details
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