US5547906A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Methods for producing integrated circuit devices
Assignee: Adeia Semiconductor Technologies LLC
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Filing: 1994-07-13
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Granted: 1996-08-20
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Expires: 2014-07-13
Abstract
Abstract A method for producing integrated circuit devices including the steps of producing a plurality of integrated circuits on a wafer, each of the integrated circuits including a multiplicity of pads and thereafter slicing the wafer, thereby to define a plurality of integrated circuit elements, and wherein the step of slicing exposes sectional surfaces of the multiplicity of pads. Apparatus for carrying out the method and integrated circuit devices are also described and claimed.
Inventors
- 👤 Pierre Badehi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 11:48
CPC Classifications
H; H10; H10W; H10W90/00; H10P; H10P54/00; H10W72/00; H10W72/01; H10W72/0198; H10W72/60; H10W72/834; H10W90/20; H10W90/288
Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
143 words
A method of producing prepackaged integrated circuit devices comprising the steps of: providing a wafer having a first surface and a second surface generally parallel to and oppositely directed with respect to said first surface; producing a plurality of integrated circuit dies on said first surface of said wafer, each of the integrated circuit dies comprising a multiplicity of pads; attaching a first electrically insulative plate to said plurality of integrated circuit dies on the first surface of said wafer; separating the integrated circuit dies from each other so as to define edges thereof while the dies remain attached to the insulative plate; generally surrounding said integrated circuits on said edges and said second surface with a protective sealant; and thereafter slicing the wafer and protective sealant and the insulative plate attached thereto, thereby to define a plurality of prepackaged integrated circuit devices.
Claim 2
Independent Claim
143 words
A method of producing prepackaged integrated circuit devices comprising the steps of: providing a wafer having a first surface and a second surface generally parallel to and oppositely directed with respect to said first surface; producing a plurality of integrated circuit dies on said first surface of said wafer, each of the integrated circuit dies comprising a multiplicity of pads; attaching a first electrically insulative plate to said plurality of integrated circuit dies on the first surface of said wafer; separating the integrated circuit dies from each other so as to define edges thereof while the dies remain attached to the insulative plate; generally surrounding said integrated circuits on said edges and said second surface with a protective sealant; and thereafter slicing the wafer and protective sealant and the insulative plate attached thereto, thereby to define a plurality of prepackaged integrated circuit devices.
Claim 3
Dependent Claim
21 words
A method according to claim 1 and wherein the step of slicing exposes cross sectional surfaces of said multiplicity of pads.
Claim 4
Dependent Claim
45 words
A method according to claim 1 and also comprising the steps of providing a conductive layer over edges of the integrated circuits formed by the slicing step and electrically separating portions of the conductive layer electrically connected with separate ones of said multiplicity of pads.
Claim 5
Dependent Claim
30 words
A method according to claim 3 and wherein an electrical insulative layer is present along the sliced edges of said integrated circuits before the step of providing a conductive layer.
Claim 6
Dependent Claim
28 words
A method according to claim 3 and wherein said step of providing a conductive layer comprises forming a conductive coating also over non-edge portions of the integrated circuit.
Claim 7
Dependent Claim
28 words
A method according to claim 1 and wherein a plurality of wafers bearing integrated circuits are joined together in a stacked arrangement to provide multi-layer integrated circuit devices.
Claim 8
Dependent Claim
23 words
A method according to claim 1 and also comprising anti-corrosion treatment of electrical contacts of said integrated circuit devices including exposed pad edges.
Claim 9
Independent Claim
159 words
A method of producing prepackaged integrated circuit devices comprising the steps of: providing a wafer having a first surface and a second surface generally parallel to and oppositely directed with respect to said first surface; producing a plurality of integrated circuit dies on said first surface of said wafer, each of the integrated circuit dies comprising a multiplicity of pads; attaching a first electrically insulative plate to said plurality of integrated circuit dies on the first surface of said wafer; separating the integrated circuit dies from each other so as to define edges thereof while the dies remain attached to the insulative plate; generally surrounding said integrated circuit dies on said edges with a protective sealant; attaching a second insulative plate to said plurality of integrated circuit dies on said second surface of said wafer; and thereafter slicing the wafer and protective sealant and the insulative plates attached thereto, thereby to define a plurality of prepackaged integrated circuit devices.
Claim 10
Independent Claim
159 words
A method of producing prepackaged integrated circuit devices comprising the steps of: providing a wafer having a first surface and a second surface generally parallel to and oppositely directed with respect to said first surface; producing a plurality of integrated circuit dies on said first surface of said wafer, each of the integrated circuit dies comprising a multiplicity of pads; attaching a first electrically insulative plate to said plurality of integrated circuit dies on the first surface of said wafer; separating the integrated circuit dies from each other so as to define edges thereof while the dies remain attached to the insulative plate; generally surrounding said integrated circuit dies on said edges with a protective sealant; attaching a second insulative plate to said plurality of integrated circuit dies on said second surface of said wafer; and thereafter slicing the wafer and protective sealant and the insulative plates attached thereto, thereby to define a plurality of prepackaged integrated circuit devices.
Claim 11
Independent Claim
80 words
A method of producing prepackaged integrated circuit devices comprising the steps of: providing a wafer having an first surface and a second surface generally parallel to and oppositely directed with respect to said first surface; producing a plurality of integrated circuit dies on said first surface of said wafer, each of the integrated circuit dies comprising a multiplicity of aluminum pads; exposing the multiplicity of pads; and applying anti-corrosion treatment to the multiplicity of pads, by employing a chromating solution.
Claim 12
Independent Claim
80 words
A method of producing prepackaged integrated circuit devices comprising the steps of: providing a wafer having an first surface and a second surface generally parallel to and oppositely directed with respect to said first surface; producing a plurality of integrated circuit dies on said first surface of said wafer, each of the integrated circuit dies comprising a multiplicity of aluminum pads; exposing the multiplicity of pads; and applying anti-corrosion treatment to the multiplicity of pads, by employing a chromating solution.
Claim 13
Dependent Claim
20 words
A method according to claim 8 and wherein the step of slicing exposes sectional surfaces of said multiplicity of pads.
Claim 14
Dependent Claim
40 words
A method according to claim 8 and also comprising the steps of providing a conductive layer over sliced edges of the integrated circuits and electrically separating portions of the conductive layer communicating with separate ones of said multiplicity of pads.
Claim 15
Dependent Claim
30 words
A method according to claim 11 and wherein an electrical insulative layer is present along the sliced edges of said integrated circuits before the step of providing a conductive layer.
Claim 16
Dependent Claim
28 words
A method according to claim 11 and wherein said step of providing a conductive layer comprises forming a conductive coating also over non-edge portions of the integrated circuit.
Claim 17
Dependent Claim
32 words
A method according to claim 8 and wherein said slicing step is carried out at locations whereby the silicon substrate is not exposed at the sliced edges of the resulting integrated circuits.
Claim 18
Dependent Claim
28 words
A method according to claim 8 and wherein a plurality of wafers bearing integrated circuits are joined together in a stacked arrangement to provide multi-layer integrated circuit devices.
Claim 19
Dependent Claim
23 words
A method according to claim 8 and also comprising anti-corrosion treatment of electrical contacts of said integrated circuit devices including exposed pad edges.
Claim 20
Dependent Claim
29 words
A method according to claim 9 and also comprising the step of separating the integrated circuit dies from each other, thereby to define a plurality of integrated circuit devices.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-08-20 | 2000-02-19 | 2000-08-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-08-20 | 2004-02-19 | 2004-08-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-08-20 | 2008-02-19 | 2008-08-20 | $7700.00 | Window Closed / Lapsed |