US5455455A — Methods for producing packaged integrated circuit…

Claim 1

Independent Claim 111 words

A method of producing packaged integrated circuit devices comprising the steps of: producing a plurality of integrated circuits on a wafer having first and second planar surfaces, each of the integrated circuits comprising a multiplicity of pads; separating the integrated circuits from each other so as to define edges thereof and generally surrounding said integrated circuits on said edges and on said first and second planar surfaces with generally the same protective sealant and waferwise attaching to said protective sealant adjacent both of said surfaces a layer of protective material, thereby producing a waferwise sandwich; and thereafter slicing the waferwise sandwich, thereby to define a plurality of prepackaged integrated circuit devices.

Claim 2

Independent Claim 111 words

A method of producing packaged integrated circuit devices comprising the steps of: producing a plurality of integrated circuits on a wafer having first and second planar surfaces, each of the integrated circuits comprising a multiplicity of pads; separating the integrated circuits from each other so as to define edges thereof and generally surrounding said integrated circuits on said edges and on said first and second planar surfaces with generally the same protective sealant and waferwise attaching to said protective sealant adjacent both of said surfaces a layer of protective material, thereby producing a waferwise sandwich; and thereafter slicing the waferwise sandwich, thereby to define a plurality of prepackaged integrated circuit devices.

Claim 3

Dependent Claim 20 words

A method according to claim 1 and wherein the step of slicing exposes sectional surfaces of said multiplicity of pads.

Claim 4

Dependent Claim 38 words

A method according to claim 2 and wherein the step of slicing cuts pads associated with a pair of adjacent integrated circuits, thereby to simultaneously define electrical contact regions for both of said pair of adjacent integrated circuits.

Claim 5

Dependent Claim 40 words

A method according to claim 1 and also comprising the steps of providing a conductive layer over sliced edges of the integrated circuits and electrically separating portions of the conductive layer communicating with separate ones of said multiplicity of pads.

Claim 6

Dependent Claim 30 words

A method according to claim 4 and wherein an electrical insulative layer is present along the sliced edges of said integrated circuits before the step of providing a conductive layer.

Claim 7

Dependent Claim 27 words

A method according to claim 4 and wherein said step of providing a conductive layer comprises forming a conductive coating over non-edge portions of the integrated circuit.

Claim 8

Dependent Claim 13 words

A method according to claim 1 and wherein said protective sealant comprises epoxy.

Claim 9

Dependent Claim 29 words

A method according to claim 1 and wherein a thermal contact to a heat sink is formed on at least one outer planar surface of said integrated circuit devices.

Claim 10

Dependent Claim 23 words

A method according to claim 1 and also comprising the step of providing an integrally formed ground plane in said integrated circuit devices.

Claim 11

Dependent Claim 28 words

A method according to claim 1 and wherein a plurality of wafers bearing integrated circuits are joined together in a stacked arrangement to provide multi-layer integrated circuit devices.

Claim 12

Dependent Claim 24 words

A method according to claim 1 and also comprising the step of mounting the integrated circuit devices along their edges onto a mounting element.

Claim 13

Dependent Claim 22 words

A method according to claim 1 and wherein said protective material is transparent to radiation which is used for erasing EPROM devices.

Claim 14

Dependent Claim 23 words

A method according to claim 1 and also comprising anti-corrosion treatment of electrical contacts of said integrated circuit devices including exposed pad edges.

Claim 15

Dependent Claim 12 words

An integrated circuit device constructed according to the method of claim 1.

Claim 16

Dependent Claim 27 words

An integrated circuit device according to claim 14 and wherein said integrated circuit device includes a plurality of semiconductor portions which are mutually isolated from each other.

Claim 17

Dependent Claim 28 words

An integrated circuit device according to claim 14 and comprising at least one semiconductor element which is mechanically and electrically isolated from the exterior surface of the device.

Claim 18

Dependent Claim 28 words

An integrated circuit device according to claim 1 and also comprising an integrally formed thermal contact to a heat sink on an outer planar surface of the device.

Claim 19

Dependent Claim 16 words

An integrated circuit device according to claim 1 and also comprising an integrally formed ground plane.

Claim 20

Dependent Claim 36 words

An integrated circuit device according to claim 14 and wherein conductive strips are formed on the outside surface of said integrated circuit device for interconnecting said exposed sections of conductive pads at a plurality of edges.

Claim 21

Independent Claim 102 words

A method of producing packaged integrated circuit devices comprising the steps of: producing a plurality of integrated circuits having planar surfaces on a wafer, each of the integrated circuits comprising a multiplicity of pads; separating the integrated circuits from each other so as to define edges thereof and generally surrounding said integrated circuits on their edges and on their planar surfaces with generally the same protective sealant, thereby producing a waferwise sandwich; and thereafter slicing the waferwise sandwich, thereby to define a plurality of prepackaged integrated circuit elements, and wherein the step of slicing exposes sectional surfaces of said multiplicity of pads.

Claim 22

Independent Claim 102 words

A method of producing packaged integrated circuit devices comprising the steps of: producing a plurality of integrated circuits having planar surfaces on a wafer, each of the integrated circuits comprising a multiplicity of pads; separating the integrated circuits from each other so as to define edges thereof and generally surrounding said integrated circuits on their edges and on their planar surfaces with generally the same protective sealant, thereby producing a waferwise sandwich; and thereafter slicing the waferwise sandwich, thereby to define a plurality of prepackaged integrated circuit elements, and wherein the step of slicing exposes sectional surfaces of said multiplicity of pads.

Claim 23

Dependent Claim 58 words

A method according to claim 20 and wherein the step of slicing cuts a plurality of pads including some which communicate with one of a pair of adjacent integrated circuits and others which communicate with another of the pair of adjacent integrated circuits, thereby to define electrical contact regions for both of said pair of adjacent integrated circuits.

Claim 24

Dependent Claim 13 words

A method according to claim 20 and wherein said protective sealant comprises epoxy.

Claim 25

Independent Claim 124 words

A method of producing packaged integrated circuit devices comprising the steps of: producing a plurality of integrated circuits on a wafer having first and second planar surfaces, each of the integrated circuits comprising a multiplicity of pads; separating the integrated circuits from each other so as to define edges thereof and generally surrounding said integrated circuits on said edges with epoxy and waferwise bonding onto both of said surfaces a layer of protective material, thereby producing a waferwise sandwich; and thereafter slicing the waferwise sandwich, thereby to define a plurality of prepackaged integrated circuit devices, and wherein prior to said slicing step, the integrated circuits are surrounded on their planar surfaces by said layer of protective material and on their edges by said epoxy.

Claim 26

Independent Claim 124 words

A method of producing packaged integrated circuit devices comprising the steps of: producing a plurality of integrated circuits on a wafer having first and second planar surfaces, each of the integrated circuits comprising a multiplicity of pads; separating the integrated circuits from each other so as to define edges thereof and generally surrounding said integrated circuits on said edges with epoxy and waferwise bonding onto both of said surfaces a layer of protective material, thereby producing a waferwise sandwich; and thereafter slicing the waferwise sandwich, thereby to define a plurality of prepackaged integrated circuit devices, and wherein prior to said slicing step, the integrated circuits are surrounded on their planar surfaces by said layer of protective material and on their edges by said epoxy.

Claim 27

Dependent Claim 20 words

A method according to claim 23 and wherein the step of slicing exposes sectional surfaces of said multiplicity of pads.

Claim 28

Dependent Claim 38 words

A method according to claim 24 and wherein the step of slicing cuts pads associated with a pair of adjacent integrated circuits, thereby to simultaneously define electrical contact regions for both of said pair of adjacent integrated circuits.

Claim 29

Dependent Claim 58 words

A method according to claim 23 and wherein the step of slicing cuts a plurality of pads including some which communicate with one of a pair of adjacent integrated circuits and others with communication with another of the pair of adjacent integrated circuits, thereby to define electrical contact regions for both of said pair of adjacent integrated circuits.

Claim 30

Dependent Claim 41 words

A method according to claim 23 and also comprising the steps of providing a conductive layer over sliced edges of the packaged integrated circuits and electrically separating portions of the conductive layer communicating with separate ones of said multiplicity of pads.

Claim 31

Dependent Claim 31 words

A method according to claim 27 and wherein an electrical insulative layer is present along the sliced edges of said packaged integrated circuits before the step of providing a conductive layer.

Claim 32

Dependent Claim 29 words

A method according to claim 27 and wherein said step of providing a conductive layer comprises forming a conductive coating also over non-edge portions of the packaged integrated circuit.

Claim 33

Dependent Claim 22 words

A method according to claim 23 and wherein said separating step includes the steps of scribing and subsequent etching of the wafer.

Claim 34

Dependent Claim 33 words

A method according to claim 23 and wherein said slicing step is carried out at locations whereby the silicon substrate is not exposed at the sliced edges of the resulting packaged integrated circuits.

Claim 35

Dependent Claim 30 words

A method according to claim 23 and wherein a thermal contact to a heat sink is formed on at least one outer planar surface of said packaged integrated circuit devices.

Claim 36

Dependent Claim 23 words

A method according to claim 23 and also comprising the step of providing an integrally formed ground plane in said integrated circuit devices.

Claim 37

Dependent Claim 29 words

A method according to claim 23 and wherein a plurality of wafers bearing integrated circuits are joined together in a stacked arrangement to provide packaged multi-layer integrated circuit devices.

Claim 38

Dependent Claim 25 words

A method according to claim 23 and also comprising the step of mounting the packaged integrated circuit devices along their edges onto a mounting element.

Claim 39

Dependent Claim 22 words

A method according to claim 23 and wherein said protective material is transparent to radiation which is used for erasing EPROM devices.

Claim 40

Dependent Claim 23 words

A method according to claim 23 and also comprising anti-corrosion treatment of electrical contacts of said integrated circuit devices including exposed pad edges.

Claim 41

Independent Claim 141 words

A method of producing packaged semiconductor devices comprising the steps of: producing a plurality of semiconductor elements on a wafer having first and second planar surfaces, each of the semiconductor elements comprising a multiplicity of pads; separating the integrated circuits from each other so as to define edges thereof and generally surrounding said semiconductor elements at said edges and said first and second planar surfaces with generally the same protective sealant and waferwise attaching to said protective sealant adjacent both of said surfaces a layer of protective material, thereby producing a waferwise sandwich; thereafter slicing the waferwise sandwich, thereby to define a plurality of prepackaged semiconductor element devices, each comprising a mechanically protective and electrically insulative package having a plurality of exposed cross-sections of said pads exposed at edges thereof; and providing electrical connections between said exposed cross-sections and external circuitry.

Claim 42

Independent Claim 141 words

A method of producing packaged semiconductor devices comprising the steps of: producing a plurality of semiconductor elements on a wafer having first and second planar surfaces, each of the semiconductor elements comprising a multiplicity of pads; separating the integrated circuits from each other so as to define edges thereof and generally surrounding said semiconductor elements at said edges and said first and second planar surfaces with generally the same protective sealant and waferwise attaching to said protective sealant adjacent both of said surfaces a layer of protective material, thereby producing a waferwise sandwich; thereafter slicing the waferwise sandwich, thereby to define a plurality of prepackaged semiconductor element devices, each comprising a mechanically protective and electrically insulative package having a plurality of exposed cross-sections of said pads exposed at edges thereof; and providing electrical connections between said exposed cross-sections and external circuitry.

Claim 43

Dependent Claim 13 words

A method according to claim 38 and wherein said protective sealant comprises epoxy.

Claim 44

Dependent Claim 106 words

An integrated circuit device comprising: a packaged integrated circuit assembly comprising a semiconductor substrate having at least first and second patterned metal layers formed over said semiconductor substrate, defining therewith semiconductor circuit elements having edges, said semiconductor substrate being generally surrounded along its edges and over said first and second patterned metal layers by generally the same protective sealant, said integrated circuit assembly having top and bottom surfaces formed of electrically insulative and mechanically protective material and electrically insulative edge surfaces defined by said protective sealant and having exposed sections of conductive pads formed by at least one of said first and second patterned metal layers.

Claim 45

Dependent Claim 106 words

An integrated circuit device comprising: a packaged integrated circuit assembly comprising a semiconductor substrate having at least first and second patterned metal layers formed over said semiconductor substrate, defining therewith semiconductor circuit elements having edges, said semiconductor substrate being generally surrounded along its edges and over said first and second patterned metal layers by generally the same protective sealant, said integrated circuit assembly having top and bottom surfaces formed of electrically insulative and mechanically protective material and electrically insulative edge surfaces defined by said protective sealant and having exposed sections of conductive pads formed by at least one of said first and second patterned metal layers.

Claim 46

Dependent Claim 25 words

An integrated circuit device according to claim 40 and wherein said integrated circuit assembly comprises a plurality of semiconductor chips bonded together in stacked arrangement.

Claim 47

Dependent Claim 26 words

An integrated circuit device according to claim 41 and wherein said plurality of semiconductor chips are mutually insulated from each other within said integrated circuit assembly.

Claim 48

Dependent Claim 34 words

An integrated circuit device according to claim 40 and also comprising conductive strips formed on the outer surface of the integrated circuit device and in electrical communication with said exposed sections of conductive pads.

Claim 49

Dependent Claim 22 words

An integrated circuit device according to claim 43 and wherein said conductive strips extend along the edges of said integrated circuit device.

Claim 50

Dependent Claim 23 words

An integrated circuit device according to claim 44 and wherein said conductive strips extend also to planar surfaces of said integrated circuit device.

Claim 51

Dependent Claim 41 words

An integrated circuit device according to claim 40 and wherein conductive strips are formed on the outside surface of said integrated circuit device for interconnecting said exposed sections of conductive pads of a plurality of dies, thereby providing electrical interconnection therebetween.

Annuity Stage	Window Opens	Payment Deadline	Surcharge Period Until	Estimated Fee	Status
3.5 Years (Year 4)	1998-10-02	1999-04-03	1999-10-03	$2000.00	Window Closed / Lapsed
7.5 Years (Year 8)	2002-10-02	2003-04-03	2003-10-03	$3760.00	Window Closed / Lapsed
11.5 Years (Year 12)	2006-10-02	2007-04-03	2007-10-03	$7700.00	Window Closed / Lapsed

Methods for producing packaged integrated circuit devices and packaged integrated circuit devices produced thereby

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