Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
268 words
A digital modulator comprising: means for differential encoding and mapping a digital baseband signal into a pair of symbol mapping data respectfully corresponding to in-phase and quadrature phase components of said digital baseband signal; means for designating burst transmission; digital filter means, having a predefined impulse response waveform, wherein said impulse response waveform is divided into symbol sections, said digital filter means further comprising: a plurality of memory means, wherein each of said memory means stores numerical values representing a different corresponding one of said symbol sections of said impulse response waveform multiplied by a carrier signal; output masking means for selectively setting the numerical values read from said plurality of memory means to zero; mask controlling means responsive to a designation of burst transmission by said burst transmission designating means, for controlling said output masking means in a predetermined timing pattern; means, connected between said memory means and said encoding and mapping means, for accumulating a predefined number of said pairs of symbol mapping data, said predefined number corresponds to the number of symbol sections into which the impulse response waveform is divided; means, connected to said accumulating means and operating in response to said accumulated pairs of symbol mapping data, for accessing said numerical values in said plurality of memory means; and means, connected to said plurality of memory means, for summing the accessed numerical values from each of the memory means to produce an output signal of said digital filter means; and converting means, connected to said digital filter means, for converting said output signal of said digital filter means into an analog modulated signal.
Claim 2
Dependent Claim
268 words
A digital modulator comprising: means for differential encoding and mapping a digital baseband signal into a pair of symbol mapping data respectfully corresponding to in-phase and quadrature phase components of said digital baseband signal; means for designating burst transmission; digital filter means, having a predefined impulse response waveform, wherein said impulse response waveform is divided into symbol sections, said digital filter means further comprising: a plurality of memory means, wherein each of said memory means stores numerical values representing a different corresponding one of said symbol sections of said impulse response waveform multiplied by a carrier signal; output masking means for selectively setting the numerical values read from said plurality of memory means to zero; mask controlling means responsive to a designation of burst transmission by said burst transmission designating means, for controlling said output masking means in a predetermined timing pattern; means, connected between said memory means and said encoding and mapping means, for accumulating a predefined number of said pairs of symbol mapping data, said predefined number corresponds to the number of symbol sections into which the impulse response waveform is divided; means, connected to said accumulating means and operating in response to said accumulated pairs of symbol mapping data, for accessing said numerical values in said plurality of memory means; and means, connected to said plurality of memory means, for summing the accessed numerical values from each of the memory means to produce an output signal of said digital filter means; and converting means, connected to said digital filter means, for converting said output signal of said digital filter means into an analog modulated signal.
Claim 3
Dependent Claim
42 words
The digital modulator according to claim 1, wherein said mask controlling means sequentially controls said output masking means on the basis of a symbol period so as to perform a ramp process during a rise and a fall of a burst transmission.
Claim 4
Dependent Claim
40 words
The digital modulator according to claim 1, wherein said output masking means includes a plurality of logic gate means provided corresponding to said plurality of memory means, each being closed and opened by the output of said mask controlling means.