Quadrature modulation circuit

Claim 2

A quadrature modulation circuit including at least a low pass filter using ROM for limiting the frequency band-width of the in-phase channel and the quadrature channel, at least a D/A converter for converting the digital signal received from said low pass filter to an analog signal, at least a filter for suppressing the aliases outputted from said D/A converter, a quadrature modulator for modulating a carrier signal with the output from said filter: wherein said low pass filter includes time division process means for time division operation of said filter for the in-phase channel and the quadrature channel with the same band-width limiting characteristic for both the in-phase channel and the quadrature-phase channel.

Claim 3

A quadrature modulation circuit including at least a low pass filter using ROM for limiting the frequency band-width of the in-phase channel and the quadrature channel, at least a D/A converter for converting the digital signal received from said low pass filter to an analog signal, at least a filter for suppressing the aliases outputted from said D/A converter, a quadrature modulator for modulating a carrier signal with the output from said filter: wherein said low pass filter includes means for using one symbol of data in a symbol data as a sign data, and for inverting the sign of the remaining symbols of data in said symbol data and the output data from said ROM by using said one symbol data.

Claim 4

A quadrature modulation circuit including at least a low pass filter using ROM for limiting the frequency band-width of the in-phase channel and the quadrature channel, at least a D/A converter for converting the digital signal received from said low pass filter to an analog signal, at least a filter for suppressing the aliases outputted from said D/A converter, a quadrature modulator for modulating a carrier signal with the output from said filter: wherein said low pass filter includes means for using one symbol of data in a symbol data as a sign data, and for inverting the sign of the remaining symbols of data in said symbol data and the output data from said ROM by using said one symbol data.

Claim 5

A quadrature modulation circuit including at least a low pass filter using ROM for limiting the frequency band-width of the in-phase channel and the quadrature channel, at least a D/A converter for converting the digital signal received from said low pass filter to an analog signal, at least a filter for suppressing the aliases outputted from said D/A converter, a quadrature modulator for modulating a carrier signal with the output from said filter: wherein said low pass filter includes means for dividing the data into a first half portion and a second half portion, and for reading out contents of the ROM along the forward direction of the time axis for said first half portion, and along the backward direction of the time axis for said second half portion.

Claim 6

A quadrature modulation circuit including at least a low pass filter using ROM for limiting the frequency band-width of the in-phase channel and the quadrature channel, at least a D/A converter for converting the digital signal received from said low pass filter to an analog signal, at least a filter for suppressing the aliases outputted from said D/A converter, a quadrature modulator for modulating a carrier signal with the output from said filter: wherein said low pass filter includes means for dividing the data into a first half portion and a second half portion, and for reading out contents of the ROM along the forward direction of the time axis for said first half portion, and along the backward direction of the time axis for said second half portion.

Claim 7

A quadrature modulation circuit of claim 1: wherein said D/A converter converts the digital signal received from said low pass filter to an analog signal by time division process.

Claim 8

A quadrature modulation circuit of claim 1: wherein said low pass filter, also uses one symbol data in a symbol data as a sign data, and inverts the sign of the remaining symbol data and an output data from a ROM by using said one symbol data.

Claim 9

A quadrature modulation circuit of claim 5: wherein said D/A converter converts the digital signal received from said low pass filter to an analog signal by time division process.

Claim 10

A quadrature modulation circuit of claim 5: wherein said low pass filter, further divides the data into the first half portion and the second half portion, and reads out contents of the ROM for forward direction of the time axis at said first half portion, and for backward direction of the time axis at said second half portion.

Claim 11

A quadrature modulation circuit of claim 7: wherein said D/A converter converts the digital signal received from said low pass filter to an analog signal by time division process.

Claim 12

A quadrature modulation circuit of claim 1: wherein said low pass filter, further divides the data into the first half portion and the second half portion, and reads out contents of the ROM for forward direction of the time axis at said first half portion, and for backward direction of the time axis at said second half portion.

Claim 13

A quadrature modulation circuit of claim 9: wherein said D/A converter converts the digital signal received from said low pass filter to an analog signal by time division process.

Claim 14

A quadrature modulation circuit of claim 2: wherein said low pass filter, further divides the data into the first half portion and the second half portion, and reads out contents of the ROM for forward direction of the time axis at said first half portion, and for backward direction of the time axis at said second half portion.

Claim 15

A quadrature modulation circuit of claim 11: wherein said D/A converter converts the digital signal received from said low pass filter to an analog signal by time division process.

Claim 16

A quadrature modulation circuit including at least a low pass filter for limiting the frequency band-width of the base-band signal to be frequency-modulated, an adder for adding the output of said low pass filter, a latch circuit for adding the output of said adder to the preceding output of said adder, a COS ROM and a SIN ROM for converting the phase value of the output from said adder to an in-phase channel signal and a quadrature channel signal respectively, D/A converters for converting the digital signal received from said COS ROM or SIN ROM respectively, at least a filter for suppressing the aliases outputted from said D/A converter, a quadrature modulator for modulating carrier signal with the output from said filter: wherein said low pass filter includes means for using one symbol of data in a symbol data as a sign data, and for inverting the sign of the remaining symbols of data in said symbol data and the output data from said ROM by using said one symbol data.

Claim 17

A quadrature modulation circuit including at least a low pass filter for limiting the frequency band-width of the base-band signal to be frequency-modulated, an adder for adding the output of said low pass filter, a latch circuit for adding the output of said adder to the preceding output of said adder, a COS ROM and a SIN ROM for converting the phase value of the output from said adder to an in-phase channel signal and a quadrature channel signal respectively, D/A converters for converting the digital signal received from said COS ROM or SIN ROM respectively, at least a filter for suppressing the aliases outputted from said D/A converter, a quadrature modulator for modulating carrier signal with the output from said filter: wherein said low pass filter includes means for using one symbol of data in a symbol data as a sign data, and for inverting the sign of the remaining symbols of data in said symbol data and the output data from said ROM by using said one symbol data.

Claim 18

A quadrature modulation circuit including at least a low pass filter using ROM for limiting the frequency band-width of the base-band signal to be frequency modulated, an adder for adding the output of said low pass filter, a latch circuit for adding the output of said adder to the preceding output of said adder, a COS ROM and a SIN ROM for converting the phase value of the output from said adder to an in-phase channel signal and a quadrature channel signal respectively, D/A converters for converting the digital signal received from said COS ROM or SIN ROM respectively, at least a filter for suppressing the aliases outputted from said D/A converter, a quadrature modulator for modulating the output from said filter: wherein said low pass filter includes means for dividing the data into a first half portion and a second half portion, and for reading out contents of the ROM along the forward direction of the time axis for said first half portion, and along the backward direction of the time axis for said second half portion.

Claim 19

A quadrature modulation circuit including at least a low pass filter using ROM for limiting the frequency band-width of the base-band signal to be frequency modulated, an adder for adding the output of said low pass filter, a latch circuit for adding the output of said adder to the preceding output of said adder, a COS ROM and a SIN ROM for converting the phase value of the output from said adder to an in-phase channel signal and a quadrature channel signal respectively, D/A converters for converting the digital signal received from said COS ROM or SIN ROM respectively, at least a filter for suppressing the aliases outputted from said D/A converter, a quadrature modulator for modulating the output from said filter: wherein said low pass filter includes means for dividing the data into a first half portion and a second half portion, and for reading out contents of the ROM along the forward direction of the time axis for said first half portion, and along the backward direction of the time axis for said second half portion.