PBX telephone system I/O interface

Claim 1

Input/output (I/O) interface apparatus for use with a time slot interchange (TSI) matrix switch which exchanges serial bit signal packets in each sample frame of a source sample frequency with N number of asynchronous signal sources, at a source line frequency, comprising: plurality of signal ports, one signal port associated with each signal source, for receiving and transmitting the signal packets between the TSI matrix switch and the associated source; timing means for providing a clock signal having a clock frequency at least 2 times higher in frequency than the source line frequency and having a clock time period; program control means, responsive to said clock signal and to each of the n number of sources, for regulating the length of a real time interval between the time of arrival (TOA) and the time of departure (TOD) of the signal packets at each said signal port in dependence on the source line frequency and for regulating the actual TOA and actual TOD of the signal packets at each said port in dependence on said clock frequency; and signal transfer means responsive to said clock signal and to said actual TOA and said actual TOD of the signal packets at each said port, for exchanging the serial bit signals of each signal packet between each said signal port and the TSI matrix switch at a signal bit line frequency substantially equal to said clock frequency.

Claim 4

A method for exchanging serial bit signal packets between N number of asynchronous signal sources and a time slot interchange (TSI) matrix switch in each sample frame of a source sample frequency, each signal packet including M number of serial signal bits at a source line frequency, comprising the steps of: designating N number of signal ports, one signal port associated with each signal source, for receiving and transmitting the signal packets between the TSI matrix switch and the associated source; providing a clock signal at a clock frequency at least N times higher in frequency than the source line frequency, and having a clock time period; controlling, in each sample frame, the time of arrival (TOA) of the signal packet received at each said signal port from the associated signal source and the time of departure (TOD) of the signal packet transmitted from each said signal port to the associated source, such that the actual TOA and the actual TOD of the signal packets or preceding and succeeding signal ports, in an operator selected sequence of said signal ports, are spaced at real time intervals substantially such that the length of a real time interval between the actual TOA and the acutal TOD of the signal packets of each said signal port is set in dependence on said source line frequency; and transferring the serial bits of each signal packet between each said signal port and the TSI matrix switch at a signal bit line frequency substantially equal to said clock frequency.

Claim 5

A method for exchanging serial bit signal packets between N number of asynchronous signal sources and a time slot interchange (TSI) matrix switch in each sample frame of a source sample frequency, each signal packet including M number of serial signal bits at a source line frequency, comprising the steps of: designating N number of signal ports, one signal port associated with each signal source, for receiving and transmitting the signal packets between the TSI matrix switch and the associated source; providing a clock signal at a clock frequency at least N times higher in frequency than the source line frequency, and having a clock time period; controlling, in each sample frame, the time of arrival (TOA) of the signal packet received at each said signal port from the associated signal source and the time of departure (TOD) of the signal packet transmitted from each said signal port to the associated source, such that the actual TOA and the actual TOD of the signal packets or preceding and succeeding signal ports, in an operator selected sequence of said signal ports, are spaced at real time intervals substantially such that the length of a real time interval between the actual TOA and the acutal TOD of the signal packets of each said signal port is set in dependence on said source line frequency; and transferring the serial bits of each signal packet between each said signal port and the TSI matrix switch at a signal bit line frequency substantially equal to said clock frequency.