Time division switching system

Claim 2

A communication switching system comprising: a plurality of input time division multiplex lines and a plurality of output time division multiplex lines, a switching network having a plurality of input ports and a plurality of output ports, a plurality of input buffer memories equal in number to the number of said inpuT ports and individually associated with corresponding ones of said input ports for storing data words, first transfer means for simultaneously transferring and distributing incoming data words received from said plurality of input multiplex lines to a corresponding number of said plurality of buffer memories in accordance with a fixed first distribution plan, the data words of a series of words received from each input multiplex line being distributed to all of said buffer memories in a prescribed sequence, means for transmitting data words from selected ones of said buffer memories to said associated ones of said input ports, means for controlling said switching network to establish transfer paths in said network between said selected ones of said input ports and selected ones of said output ports, and second transfer means for transferring outgoing data words from said selected ones of said output ports to said output multiplex lines.

Claim 3

A communication switching system in accordance with claim 1 wherein said second transfer means comprises: a plurality of output buffer memories equal in number to the number of said output ports and individually associated with corresponding ones of said output ports for storing data words, means for transmitting data words from selected ones of said output ports to said associated ones of said output buffer memories and means for transferring and distributing outgoing data words simultaneously from said plurality of output buffer memories to said plurality of output multiplex lines in accordance with a fixed second distribution plan which is complementary to said first distribution plan.

Claim 4

A system in accordance with claim 2 wherein the number of lines in said plurality of input multiplex lines is in a ratio to the number of memories in said plurality of buffer memories as m is to n and wherein the number of ports in said plurality of output ports is in a ratio to the number of lines in said plurality of output multiplex lines as n is to m and wherein n is equal to or greater than m.

Claim 5

A communication switching system in accordance with claim 1 which further comprises clock means for generating a chain of clock pulses representing time slots, and wherein said first transfer means responds to each successive time slot clock pulse generated by said clock means to establish a plurality of paths equal in number to the number of said input time division multiplex lines to simultaneously transfer one data word if present from each of said plurality of input lines.

Claim 6

A communication switching system in accordance with claim 4 wherein said input time division multiplex lines are numbered k through n, said input buffer memories are numbered k through m, m being equal to or larger than n and wherein said first transfer means responds to clock pulses defining a first time slot in a recurring sequence of clock pulses to simultaneously establish individual data transfer paths from each of said input multiplex lines to like numbered ones of said input buffer memories and responds to other time slot pulses in the said recurring sequence to establish further individual data transfer paths in sequence from each of said input multiplex lines to ones of said buffer memories having numbers other than those of the connected input time multiplex lines.

Claim 7

A communication switching system in accordance with claim 5 wherein said recurring sequence of clock pulses recurs at the rate of once every time slots.

Claim 8

A communication switching system comprising: a plurality of input time division multiplex lines and a corresponding plurality of output time division multiplex lines; a time division switching network comprising: a plurality of network input ports, a plurality of network output ports, and switching means for selectively interconnecting said input ports and said output ports in response to network control signals; A plurality of input buffer memories equal in number to the number of said input time division multiplex lines and individually associated therewith on a one-for-one basis; a plurality of input port memories equal in number to the number of said input ports and individually associated therewith on a one-for-one basis; means for storing data received from said time division multiplex lines in said corresponding input buffer memories; input transfer means for establishing transmission paths for simultaneously transferring and distributing data words stored in said input buffer memories to a corresponding number of said plurality of input port memories in accordance with a fixed first distribution plan, the data words of a series of words stored in each input buffer memory being distributed to all of said input port memories in a prescribed sequence; means for generating said network control signals; and second transfer means for transferring data words from selected ones of said output ports to selected ones of said output multiplex lines.

Claim 9

A communication switching system comprising: a plurality of input time division multiplex lines and a corresponding plurality of output time division multiplex lines; a time division switching network comprising: a plurality of network input ports, a plurality of network output ports, and switching means for selectively interconnecting said input ports and said output ports in response to network control signals; A plurality of input buffer memories equal in number to the number of said input time division multiplex lines and individually associated therewith on a one-for-one basis; a plurality of input port memories equal in number to the number of said input ports and individually associated therewith on a one-for-one basis; means for storing data received from said time division multiplex lines in said corresponding input buffer memories; input transfer means for establishing transmission paths for simultaneously transferring and distributing data words stored in said input buffer memories to a corresponding number of said plurality of input port memories in accordance with a fixed first distribution plan, the data words of a series of words stored in each input buffer memory being distributed to all of said input port memories in a prescribed sequence; means for generating said network control signals; and second transfer means for transferring data words from selected ones of said output ports to selected ones of said output multiplex lines.

Claim 10

A communication switching system in accordance with claim 7 wherein said second transfer means comprises: a plurality of output port memories equal in number to the number of said output ports and individually associated with corresponding ones of said output ports for storing data words, means for storing data words received from selected ones of said output ports to said associated ones of said output port memories; a plurality of output buffer memories equal in number to the number of said output time division multiplex lines; and means for transferring and distributing data words stored in said output port memories from said plurality of output port memories to said plurality of output buffer memories in accordance with a fixed second distribution plan which is complementary to said first distribution plan.