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US5232861A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of manufacturing semiconductor device including a bipolar transistor

Assignee: Sony Corp
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Filing: 1991-08-28
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Granted: 1993-08-03
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Expires: 2011-08-28
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Abstract

Abstract The present invention is directed to a method of manufacturing a semiconductor device which comprises the steps of forming an opening portion through a polycide film and an insulating film sequentially formed on a semiconductor substrate of a first conductivity type so as to expose the semiconductor substrate, forming an insulating film on the side surface of the opening portion and the surface of the semiconductor substrate implanting an ion of a second conductivity type into the semiconductor substrate through the insulating film, and forming an insulating side wall in the opening portion. Thus, a metal pollution or the like in the active region due to a metal included in the polycide film can be prevented and a semiconductor device of high performance and high reliability can be manufactured. Also, the present invention is directed to a method of manufacturing a semiconductor device which comprises the steps of laminating two kinds of insulating films on a semiconductor substrate, forming a stepped opening portion for contact composed of a first opening portion through which the semiconductor substrate is exposed and a second opening portion, communicating to the first opening portion, formed by selectively removing only the upper insulating film, and burying a conductor in the stepped opening portion. Therefore, the contact widths can be reduced more and as a consequence, a semiconductor device of high performance and high reliability can be manufactured.

Inventors

  • 👤 Hiroyuki Miwa

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 15:01
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/01; H10D64/018; H10D10/00; H10D10/01; H10D10/051; H10D30/00; H10D30/01; H10D30/021; H10D30/0223; H10D64/20; H10D64/23; H10D64/251; H10D64/258; H10D64/259

Claims Analysis

Total Claims: 3
Claim 1
Independent Claim 195 words
A method of manufacturing a semiconductor device comprising the steps of: (a) forming a first insulating film (21) onto a semiconductor substrate (6a) of a first conductivity type; (b) forming a first opening through an insulating film (21); (c) forming a first polycrystalline silicon film (22) and silicide film (23) sequentially formed onto said semiconductor substrate (6a) including said opening; (d) forming a second insulating film (9) over said semiconductor substrate; (e) forming a second opening portion (10) inside the region of said first opening through said second insulating film (9), said first polycrystalline silicon film (22) and silicide film (23) so as to expose said semiconductor substrate; (f) forming a third insulating film (59) formed by a chemical vapor deposition process, which covers the side surface of said first polycrystalline silicon film (22), side surface of said silicide film (23) and side surface of said second insulating film (9) and the surface of said semiconductor substrate (6a); (g) implanting ions (58) of a second conductivity type into said semiconductor substrate (6a) through said third insulating film (59); and (h) forming an insulating side wall (12) on the side surface of said second opening (10).
Claim 2
Independent Claim 195 words
A method of manufacturing a semiconductor device comprising the steps of: (a) forming a first insulating film (21) onto a semiconductor substrate (6a) of a first conductivity type; (b) forming a first opening through an insulating film (21); (c) forming a first polycrystalline silicon film (22) and silicide film (23) sequentially formed onto said semiconductor substrate (6a) including said opening; (d) forming a second insulating film (9) over said semiconductor substrate; (e) forming a second opening portion (10) inside the region of said first opening through said second insulating film (9), said first polycrystalline silicon film (22) and silicide film (23) so as to expose said semiconductor substrate; (f) forming a third insulating film (59) formed by a chemical vapor deposition process, which covers the side surface of said first polycrystalline silicon film (22), side surface of said silicide film (23) and side surface of said second insulating film (9) and the surface of said semiconductor substrate (6a); (g) implanting ions (58) of a second conductivity type into said semiconductor substrate (6a) through said third insulating film (59); and (h) forming an insulating side wall (12) on the side surface of said second opening (10).
Claim 3
Dependent Claim 59 words
The method of manufacturing a semiconductor device according to claim 1, further comprising the steps of: ((a) forming a second polycrystalline silicon film (13) in a third opening (28) restricted by said insulating side wall (12); and (b) diffusing an impurity from said first polycrystalline silicon film (22) and second polycrystalline silicon film (13) into said semiconductor substrate (6a).

References Cited (Backward Citations)

US4356622A Cited
US4495512A Cited
US4693782A Cited
US4789648A Cited
US4808542A Cited
US4866000A Cited
US5010026A Cited
US5024957A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1996-08-02 1997-02-01 1997-08-03 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2000-08-02 2001-02-01 2001-08-03 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2004-08-02 2005-02-01 2005-08-03 $7700.00 Window Closed / Lapsed

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