Patent US2009438A successfully refreshed from Google Patents.
US4341571A
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Method of making planar devices by direct implantation into substrate using photoresist mask
Assignee: INDUSTRIES Inc A CORP OF DE
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Filing: 1980-10-29
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Granted: 1982-07-27
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Expires: 2000-10-29
Abstract
Abstract An ion implantation process uses exclusively photoresist masks to cover a substrate except in the regions to be implanted with ions. The photoresist masks are removed after each ion implantation by plasma etching.
Inventors
- 👤 Ludwig Hiss
- 👤 Ulrich Waldvogel
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 16:38
CPC Classifications
H; H10; H10P; H10P76/00; H10P76/20; H10P76/204; H10P76/2041; Y; Y10; Y10S; Y10S148/00; Y10S148/12; Y10S148/131
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
112 words
A method for making with a reduced failure rate a semiconductor device having a plurality of differently doped regions in a semiconductor substrate, the method comprising: exposing a surface of said substrate by an oxidizing plasma etching operation performed under predetermined conditions wherein the oxide layer formed by said etching operation is minimized; forming on said exposed surface a photoresist mask having at least one opening therethrough; implanting ions in an area of said substrate through said opening; repeating said exposing, forming and implanting steps to implant ions in a different area of said substrate; and diffusing said implanted ions only after the last said ion implantation step by heating said substrate.
Claim 2
Independent Claim
112 words
A method for making with a reduced failure rate a semiconductor device having a plurality of differently doped regions in a semiconductor substrate, the method comprising: exposing a surface of said substrate by an oxidizing plasma etching operation performed under predetermined conditions wherein the oxide layer formed by said etching operation is minimized; forming on said exposed surface a photoresist mask having at least one opening therethrough; implanting ions in an area of said substrate through said opening; repeating said exposing, forming and implanting steps to implant ions in a different area of said substrate; and diffusing said implanted ions only after the last said ion implantation step by heating said substrate.
Claim 3
Dependent Claim
102 words
The method recited in claim 1 wherein said differently doped regions comprise the region pairs of a plurality of insulated-gate, field-effect transistors, the method further including: covering said surface of said substrate after removing the photoresist mask following the last said ion implantation step but before said diffusion step with an insulating layer having apertures therethrough to provide exposed areas spanning said region pairs; and performing said diffusion step in an oxidizing atmosphere and at a temperature and for a time wherein said insulating layer is substantially unaffected and a gate oxide layer is formed between said region pairs in said apertures.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1985-07-26 | 1986-01-25 | 1986-07-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1989-07-26 | 1990-01-25 | 1990-07-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1993-07-26 | 1994-01-25 | 1994-07-27 | $7700.00 | Window Closed / Lapsed |