All digital delta to PCM converter

Claim 1

A digital signalling circuit for converting a delta modulated signal to a binary coded signal without producing an intermediate analog signal comprising: a. an up-down counter having a count capacity sufficient to define uniquely a predetermined number of different quantization levels, b. means responsive to an applied delta modulated signal for producing a clock signal having a rate equal to the maximum permitted repetition rate of pulses in the applied signal, c. means for indexing said up-down counter responsively to both an applied delta modulated signal and the clock signal produced by said means for producing a clock signal, d. drift correction means for biasing said counter toward its mid-value output at a rate much slower than the rate of the means for producing a clock signal, said drift correction means including means for comparing a signal proportional to the output of the counter averaged over a period very much longer than the period of the clock signal with a steady signal indicative of the mid-value output of the counter, and means for periodically indexing the counter toward its mid-value output in response to the output of said means for comparing at intervals much longer than the period of the clock signal, and e. means for producing time divided binary coded signals in response to the successive output counts of said counter.