US3902926A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of making an ion implanted resistor
Assignee: Signetics Corp
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Filing: 1974-02-22
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Granted: 1975-09-02
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Expires: 1994-02-22
Abstract
Abstract Ion implanted resistor formed in a body of crystalline semiconductor material of a first conductivity type and a known bulk resistivity with at least one region of implanted ions in the body having a conductivity opposite that of the body. The resistance changes no more than 3% from the room temperature value between - 50* and 125* C. Between 0* and 70* C., the change is only 0.3%. In the method, ion implanted resistors having the desired sheet resistivity are formed by varying the implantation energy and/or the thickness of a stopping layer. In addition, the resistor is annealed at a temperature ranging from 550* C. to 650* C.
Inventors
- 👤 David S Perloff
- 👤 John T Kerr
- 👤 James A Marley
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-22 19:37
CPC Classifications
H; H10; H10D; H10D1/00; H10D1/40; H10D1/43; H10P; H10P95/00; Y; Y10; Y10S; Y10S438/00; Y10S438/934
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
229 words
IN A METHOD FOR PRODUCING A RESISTOR IN A BODY OF CRYSTALLINE SILICON SEMICONDUCTOR MATERIAL OF N CONDUCTIVITY TYPE AND A KNOWN BULK RESISTIVITY AND HAVING A PLANAR SURFACE, FORMING A LAYER OF INSULATING MATERIAL HAVING A THICKNESS GREATER THAN APPROXIMATELY 1 MICRON ON SAID SURFACE, FORMING AT LEAST ONE OPENING IN SAID LAYER TO EXPOSE AN AREA OF SAID SURFACE, FORMING A PASSIVATING LAYER IN SAID OPENING HAVING A THICKNESS THROUGHOUT RANGING FROM APPROXIMATELY 1000 ANGSTROMS TO 3000 ANGSTROMS, IMPLANTING BORON IONS AT ROOM TEMPERATURE INTO SAID BODY THROUGH SAID PASSIVATING LAYER TO MODIFY THE CONDUCTIVITY OF THE PORTION OF THE BODY UNDERLYING SAID AREA OF SAID SURFACE TO PROVIDE AN IMPLANTED REGION HAVING AN IMPURITY CONCENTRATION RANGING FROM 10**14 TO 5 X 10**15 BORON IONS PER SQUARE CENTIMETER AND BEING DEFINED BY A PN JUNCTION EXTENDING TO SAID SURFACE, SAID LAYER OF INSULATING MATERIAL BEING SUFFICIENTLY THICK TO PREVENT SUBSTANTIALLY ANY OF SAID IONS FROM PENETRATING THERETHROUGH, SELECTIVELY VARYING EITHER THE ENERGY OF THE IONS OR THE THICKNESS OF THE PASSIVATING LAYER TO PROVIDE A SHEET RESISTIVITY RANGING FROM 870 TO 3000 OHMS PER SQUARE CENTIMETER WITH A TEMPERATURE VARIABILITY OF LESS THAN 3 PER CENT WITHIN THE TEMPERATURE RANGE OF-50*C TO 125*C, ANNEALING SAID BODY AT A TEMPERATURE OF 500*C TO 700*C, AND SECURING CONDUCTIVE LEADS TO SAID BODY TO MAKE CONTACT WITH SAID IMPLANTED REGION.
Claim 2
Dependent Claim
229 words
IN A METHOD FOR PRODUCING A RESISTOR IN A BODY OF CRYSTALLINE SILICON SEMICONDUCTOR MATERIAL OF N CONDUCTIVITY TYPE AND A KNOWN BULK RESISTIVITY AND HAVING A PLANAR SURFACE, FORMING A LAYER OF INSULATING MATERIAL HAVING A THICKNESS GREATER THAN APPROXIMATELY 1 MICRON ON SAID SURFACE, FORMING AT LEAST ONE OPENING IN SAID LAYER TO EXPOSE AN AREA OF SAID SURFACE, FORMING A PASSIVATING LAYER IN SAID OPENING HAVING A THICKNESS THROUGHOUT RANGING FROM APPROXIMATELY 1000 ANGSTROMS TO 3000 ANGSTROMS, IMPLANTING BORON IONS AT ROOM TEMPERATURE INTO SAID BODY THROUGH SAID PASSIVATING LAYER TO MODIFY THE CONDUCTIVITY OF THE PORTION OF THE BODY UNDERLYING SAID AREA OF SAID SURFACE TO PROVIDE AN IMPLANTED REGION HAVING AN IMPURITY CONCENTRATION RANGING FROM 10**14 TO 5 X 10**15 BORON IONS PER SQUARE CENTIMETER AND BEING DEFINED BY A PN JUNCTION EXTENDING TO SAID SURFACE, SAID LAYER OF INSULATING MATERIAL BEING SUFFICIENTLY THICK TO PREVENT SUBSTANTIALLY ANY OF SAID IONS FROM PENETRATING THERETHROUGH, SELECTIVELY VARYING EITHER THE ENERGY OF THE IONS OR THE THICKNESS OF THE PASSIVATING LAYER TO PROVIDE A SHEET RESISTIVITY RANGING FROM 870 TO 3000 OHMS PER SQUARE CENTIMETER WITH A TEMPERATURE VARIABILITY OF LESS THAN 3 PER CENT WITHIN THE TEMPERATURE RANGE OF-50*C TO 125*C, ANNEALING SAID BODY AT A TEMPERATURE OF 500*C TO 700*C, AND SECURING CONDUCTIVE LEADS TO SAID BODY TO MAKE CONTACT WITH SAID IMPLANTED REGION.
Claim 3
Dependent Claim
20 words
A method as in claim 1 wherein said annealing is carried out in a temperature range between 550* and 650*C.
Claim 4
Dependent Claim
23 words
A method as in claim 2 together with the step of selecting the annealing temperature so that the sheet resistivity is a maximum.
Claim 5
Dependent Claim
16 words
A method as in claim 1 wherein the implantation energy ranges from 25 to 150 keV.
Claim 6
Dependent Claim
28 words
A method as in claim 1 wherein said resistor has a low temperature variability of less than 0.3 per cent in the temperature range of 0*C to 70*C.
Claim 7
Dependent Claim
17 words
A method as in claim 1 wherein the implantation energy is varied to change the sheet resistivity.
Claim 8
Dependent Claim
20 words
A method as in claim 1 wherein the thickness of the passivating layer is varied to change the sheet resistivity.
References Cited (Backward Citations)
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-09-01 | 1979-03-03 | 1979-09-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-09-01 | 1983-03-03 | 1983-09-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-09-01 | 1987-03-03 | 1987-09-02 | $7700.00 | Window Closed / Lapsed |