Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
181 words
An analog-to-digital converter comprising: an integrating circuit, a clock pulse course, a counter, a reference signal source having a polarity opposite that of the analog signal, an auxiliary voltage source having the same polarity as that of the analog signal, first means effective upon the initiation of a conversion cycle to connect at least said auxiliary voltage source as an input to said integrating circuit until the output of the integrating circuit reaches a predetermined amplitude, said first means controlling said integrating circuit to integrate the analog signal for a predetermined time interval starting with the attainment by said integrating circuit of said predetermined amplitude, additional means for controlling said integrating circuit to integrate said reference signal for a second variable time interval beginning at the end of said predetermined time interval and until its output attains said predetermined amplitude, and means for controlling said counter to count said clock pulses throughout at least said second time interval whereby the count registered in said counter is a function of the amplitude of said analog signal in terms of said reference signal.
Claim 2
Dependent Claim
181 words
An analog-to-digital converter comprising: an integrating circuit, a clock pulse course, a counter, a reference signal source having a polarity opposite that of the analog signal, an auxiliary voltage source having the same polarity as that of the analog signal, first means effective upon the initiation of a conversion cycle to connect at least said auxiliary voltage source as an input to said integrating circuit until the output of the integrating circuit reaches a predetermined amplitude, said first means controlling said integrating circuit to integrate the analog signal for a predetermined time interval starting with the attainment by said integrating circuit of said predetermined amplitude, additional means for controlling said integrating circuit to integrate said reference signal for a second variable time interval beginning at the end of said predetermined time interval and until its output attains said predetermined amplitude, and means for controlling said counter to count said clock pulses throughout at least said second time interval whereby the count registered in said counter is a function of the amplitude of said analog signal in terms of said reference signal.
Claim 3
Dependent Claim
48 words
A converter according to claim 1 wherein said first means causes the integrating circuit to integrate both the analog signal and the auxiliary signal from the start of the conversion cycle until said first means causes the output signal of the integrating circuit to reach said predetermined level.
Claim 4
Dependent Claim
91 words
The converter of claim 1 wherein said first means further includes a comparator for permitting the application of pulses from said clock pulse source to said counter only throughout the time that said integrating circuit has an output at least equalling said predetermined amplitude, said counter controlling said first means to apply said analog signal to said integrating circuit only until said counter has reached a predetermined count at which time said counter controls said additional means to apply only said reference signal to said integrating circuit for said second interval.
Claim 5
Dependent Claim
19 words
The converter of claim 3 wherein said predetermined count of said counter is the maximum count of said counter.
Claim 6
Dependent Claim
49 words
The converter of claim 1 wherein said first means further includes comparator means distinctively responsive to the attainment by the output of said integrating circuit of said predetermined amplitude, and means controlled by said comparator means for disconnecting said auxiliary voltage source from the input of said integrating circuit.
Claim 7
Dependent Claim
63 words
The converter of claim 5 including sequence generating means, bistable circuit means being set by said sequence generating means at the start of a conversion cycle, said comparator when rendered distinctively responsive resetting said bistable circuit means, said controlled means being governed by said bistable circuit means only when in its set condition to apply said auxiliary voltage source to said iNtegrating circuit.