Abstract A circuit for comparing a known electronic circuit card with an unknown card of similar type wherein clock pulses are delivered to a multistage binary counter which delivers its output identically to the inputs of the known card and to the corresponding inputs of the unknown card. The corresponding inputs and outputs of the known card and unknown card are compared with each other by a plurality of exclusive OR-gates which generate an error signal in the event of any disagreement between the two cards. A disagreement signal causes the termination of the operation of the binary counter. This permits an operator to note the input or output of the unknown card that did not agree with the corresponding input or output of the known card and to repair the unknown card.
Inventors
👤 H Cook
Bibliographic Details
Application Number—
JurisdictionUS
Data Sourcegoogle_patents
Last Synchronized2026-10-23 17:35
CPC Classifications
G; G01; G01R; G01R31/00; G01R31/28; G01R31/2801
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
463 words
A test apparatus for testing a digital circuit by comparison with a corresponding standard digital circuit, each having a plurality of input terminals and output terminals, which comprises: means for generating a series of digital signals; first and second matrix plugs adapted to releasably couple with the plurality of input and output terminals of the circuit being tested and the standard circuit, respectively, so that insertion of the circuit being tested and the standard circuit into said first and second matrix plugs establishes connection thereto; a plurality of amplifier pairs, each of said amplifier pairs coupling said generating means to said first and second matrix plugs so that one of said series of digital signals is applied to each of the input terminals of the circuit being tested and also to the corresponding input terminal of the standard circuit, for isolating the plurality of input terminals of the circuit being tested from the plurality of input terminals of the standard circuit so that defects in the circuit being tested do not influence the operation of the standard circuit; a first plurality of gate circuits coupled to said first and second matrix plugs so that each of said first plurality of gate circuits is coupled to one of the input terminals of the circuit being tested and also to a corresponding input terminal of the standard circuit, for comparing each input signal of the circuit being tested with the corresponding input signal of the standard circuit and for providing an output signal indicative of which of the input signals of the circuit being tested are not identical to the corresponding input signals of the standard circuit; a second plurality of gate circuits coupled to said first and second matrix plugs so that each of said second plurality of gate circuits is coupled to one of the output terminals of the circuit being tested and also to a corresponding output terminal of the standard circuit, for comparing each output signal of the circuit being tested with the corresponding output signal of the standard circuit and for providing an output signal indicative of which of the output signals of the circuit being tested are not identical to the corresponding output signals of the standard circuit; and a plurality of indicating circuits, each of said plurality of indicating circuits coupled to each of said first and second plurality of gate circuits and responsive to the presence of said output signals therefrom, for individually indicating which of said input and output signals of the circuit being tested are not identical to said corresponding input and output signals of the standard circuit thereby facilitating repair of the circuit being tested by identifying which of said input and output terminals are associated with defective portions of the circuit being tested.
Claim 2
Dependent Claim
463 words
A test apparatus for testing a digital circuit by comparison with a corresponding standard digital circuit, each having a plurality of input terminals and output terminals, which comprises: means for generating a series of digital signals; first and second matrix plugs adapted to releasably couple with the plurality of input and output terminals of the circuit being tested and the standard circuit, respectively, so that insertion of the circuit being tested and the standard circuit into said first and second matrix plugs establishes connection thereto; a plurality of amplifier pairs, each of said amplifier pairs coupling said generating means to said first and second matrix plugs so that one of said series of digital signals is applied to each of the input terminals of the circuit being tested and also to the corresponding input terminal of the standard circuit, for isolating the plurality of input terminals of the circuit being tested from the plurality of input terminals of the standard circuit so that defects in the circuit being tested do not influence the operation of the standard circuit; a first plurality of gate circuits coupled to said first and second matrix plugs so that each of said first plurality of gate circuits is coupled to one of the input terminals of the circuit being tested and also to a corresponding input terminal of the standard circuit, for comparing each input signal of the circuit being tested with the corresponding input signal of the standard circuit and for providing an output signal indicative of which of the input signals of the circuit being tested are not identical to the corresponding input signals of the standard circuit; a second plurality of gate circuits coupled to said first and second matrix plugs so that each of said second plurality of gate circuits is coupled to one of the output terminals of the circuit being tested and also to a corresponding output terminal of the standard circuit, for comparing each output signal of the circuit being tested with the corresponding output signal of the standard circuit and for providing an output signal indicative of which of the output signals of the circuit being tested are not identical to the corresponding output signals of the standard circuit; and a plurality of indicating circuits, each of said plurality of indicating circuits coupled to each of said first and second plurality of gate circuits and responsive to the presence of said output signals therefrom, for individually indicating which of said input and output signals of the circuit being tested are not identical to said corresponding input and output signals of the standard circuit thereby facilitating repair of the circuit being tested by identifying which of said input and output terminals are associated with defective portions of the circuit being tested.
Claim 3
Dependent Claim
34 words
A test apparatus as defined in claim 1 which further comprises means responsive to the presence of said indication from any of said plurality of comparing and indicating circuits for stopping said generating means.
Claim 4
Dependent Claim
26 words
A test apparatus as defined in claim 2 which further comprises means for resetting the circuit being tested and the standard circuit to an initial condition.