US5361237A
Expired / Lapsed
US
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Semiconductor memory device provided with a word-line driver circuit using boosted voltage-source divided decoding
Assignee: Micron Memory Japan Ltd
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Filing: 1992-10-13
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Granted: 1994-11-01
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Expires: 2012-10-13
Abstract
Abstract A semiconductor memory device improves the power source margin without having an extended chip area. The semiconductor memory device of the present invention has a plurality of divided word lines, each having a plurality of drivers for supplying an electric current. The semiconductor memory device includes a boosting circuit for boosting and then supplying an external voltage to the plurality of drivers, and a voltage detection circuit for outputting detection signals which show the results of a comparison made between outputs of the boosting circuit and a reference voltage. The boosting circuit is structured so as to boost the external voltage according to the results of the comparison shown by the detection signals.
Inventors
- 👤 Shigeo Chishiki
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 08:44
CPC Classifications
G; G11; G11C; G11C8/00; G11C8/08; G11C8/10
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
103 words
A semiconductor memory device having a plurality of divided word lines, and a plurality of decoders and a plurality of drivers provided in each of said divided word lines for supplying an electric current, comprising: boosting means for boosting and then supplying an external voltage to said plurality of decoders and to said plurality of drivers; and a voltage detection circuit for outputting detection signals which show the results of a comparison made between outputs of said boosting means and a reference voltage; wherein, said boosting means boosts said external voltage according to said results of said comparison shown by said detection signals.
Claim 2
Dependent Claim
103 words
A semiconductor memory device having a plurality of divided word lines, and a plurality of decoders and a plurality of drivers provided in each of said divided word lines for supplying an electric current, comprising: boosting means for boosting and then supplying an external voltage to said plurality of decoders and to said plurality of drivers; and a voltage detection circuit for outputting detection signals which show the results of a comparison made between outputs of said boosting means and a reference voltage; wherein, said boosting means boosts said external voltage according to said results of said comparison shown by said detection signals.
Claim 3
Dependent Claim
25 words
A semiconductor memory device according to claim 1, comprising a reference-voltage-generation-circuit for generating said reference voltage to be used for said comparison in said voltage-detection-circuit.
Claim 4
Dependent Claim
22 words
A semiconductor memory device according to claim 1, comprising a reference-voltage-input-terminal for receiving an input which is used as said reference voltage.
Claim 5
Dependent Claim
29 words
A semiconductor memory device according to claim 1, wherein said boosting means is comprised of a plurality of transistors, each of said plurality of transistors being an N-channel transistor.
Claim 6
Dependent Claim
32 words
A semiconductor memory device according to claim 1, wherein each of said plurality of drivers is comprised of a plurality of transistors, each of said plurality of transistors being an N-channel transistor.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-10-31 | 1998-05-02 | 1998-11-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-10-31 | 2002-05-02 | 2002-11-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-10-31 | 2006-05-02 | 2006-11-01 | $7700.00 | Window Closed / Lapsed |