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US4881190A Expired / Lapsed US ⏱️ 0.0 years remaining

Digitally programmable signal generator and method

Assignee: United States Department of Energy
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Filing: 1986-09-02
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Granted: 1989-11-14
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Expires: 2006-09-02
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Abstract

Abstract A digitally programmable waveform generator for generating completely arbitrary digital or analog waveforms from very low frequencies to frequencies in the gigasample per second range. A memory array with multiple parallel outputs is addressed; then the parallel output data is latched into buffer storage from which it is serially multiplexed out at a data rate many times faster than the access time of the memory array itself. While data is being multiplexed out serially, the memory array is accessed with the next required address and presents its data to the buffer storage before the serial multiplexing of the last group of data is completed, allowing this new data to then be latched into the buffer storage for smooth continuous serial data output. In a preferred implementation, a plurality of these serial data outputs are paralleled to form the input to a digital to analog converter, providing a programmable analog output.

Inventors

  • 👤 Gordon J. Priatko
  • 👤 Jeffrey A. Kaskey

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 04:52
CPC Classifications
G; G06; G06F; G06F1/00; G06F1/02; G06F1/03; G06F1/0321

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 205 words
A digital waveform generator operating in successive time frames of a predetermined duration where each of said time frames has a plurality of clock cycles, said generator comprising: first memory means for storing digital data in a plurality of addressable memory locations, second memory means, means for accessing some of said stored digital data and transporting said data into said second memory means, said second memory means having parallel banks for storing digital data in a plurality of addressable memory locations, each of said parallel banks of said second memory means having a second access time within each of said time frames such that selected stored digital data is accessible after said second access time, multiplexer means, means for accessing some of said stored digital data during successive ones of said time frames yet after said second access time from said second memory means to said multiplexer means, said multiplexer means including means for multiplexing within each of said time frames said stored digital data from second memory means within a third access time faster than both said first access time and said second access time to form a digital waveform having a data rate faster than the access time of said second memory means.
Claim 2
Dependent Claim 205 words
A digital waveform generator operating in successive time frames of a predetermined duration where each of said time frames has a plurality of clock cycles, said generator comprising: first memory means for storing digital data in a plurality of addressable memory locations, second memory means, means for accessing some of said stored digital data and transporting said data into said second memory means, said second memory means having parallel banks for storing digital data in a plurality of addressable memory locations, each of said parallel banks of said second memory means having a second access time within each of said time frames such that selected stored digital data is accessible after said second access time, multiplexer means, means for accessing some of said stored digital data during successive ones of said time frames yet after said second access time from said second memory means to said multiplexer means, said multiplexer means including means for multiplexing within each of said time frames said stored digital data from second memory means within a third access time faster than both said first access time and said second access time to form a digital waveform having a data rate faster than the access time of said second memory means.
Claim 3
Dependent Claim 11 words
A generator as in claim 1 wherein said gnerator is programmable.
Claim 4
Dependent Claim 17 words
A generator as in claim 1 operating in a pulsed mode wherein said clock cycles are interruptable.
Claim 5
Dependent Claim 14 words
A generator as in claim 1 wherein said first memory means are randomly accessible.
Claim 6
Dependent Claim 13 words
A generator as in claim 1 wherein said multiplexer means include shift registers.
Claim 7
Dependent Claim 21 words
A generator as in claim 1 including digital to analog conversion means for converting said digital waveform into an analog waveform.
Claim 8
Dependent Claim 16 words
A generator as in claim 1 wherein said clock cycles occur at or above 1 gigahertz.
Claim 9
Dependent Claim 15 words
A generator as in claim 1 wherein said multiplexing means include Gallium Arsenide digital circuits.
Claim 10
Dependent Claim 14 words
A generator as in claim 1 wherein said generator operates in a continuous mode.
Claim 11
Dependent Claim 116 words
In a digital waveform generator operating in successive time frames of a predetermined duration where each of said time frames has a plurality of clock cycles, said generator comprising first memory means for storing digital data in a plurality of addressable memory locations and second memory means, the method comprising the steps of: accessing some of said stored digital data during successive ones of said time frames and transporting said data into said second memory means, and multiplexing within each of said time frames said stored digital data from said second memory means after a second accesstime, to form a digital waveform having a data rate faster than the access time of said second memory means.
Claim 12
Dependent Claim 116 words
In a digital waveform generator operating in successive time frames of a predetermined duration where each of said time frames has a plurality of clock cycles, said generator comprising first memory means for storing digital data in a plurality of addressable memory locations and second memory means, the method comprising the steps of: accessing some of said stored digital data during successive ones of said time frames and transporting said data into said second memory means, and multiplexing within each of said time frames said stored digital data from said second memory means after a second accesstime, to form a digital waveform having a data rate faster than the access time of said second memory means.

References Cited (Backward Citations)

US4283768A Cited
US4404644A Cited
US4424730A Cited
US4468639A Cited
US4710891A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1992-11-13 1993-05-15 1993-11-14 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1996-11-13 1997-05-15 1997-11-14 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2000-11-13 2001-05-15 2001-11-14 $7700.00 Window Closed / Lapsed

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