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Method of producing integrated silicon structures on isolated islets of the substrate

Assignee: Pour L'etude Et La Fabrication De Circuits Integres Speciaux - Efcis Ste
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Filing: 1984-11-02
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Granted: 1985-12-31
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Expires: 2004-11-02
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Abstract

Abstract A method for manufacturing integrated circuits is provided in which monocrystalline silicon islets are formed completely isolated from the substrate itself made from monocrystalline silicon, by a thick oxide layer. This thick oxide layer is formed in the following way: silicon islets are formed whose top and sides are protected with silicon nitride. Then the silicon is etched isotropically, which hollows out deeply under the islets. Thick oxidization then makes up the whole of the silicon under the islets. Thus isolated silicon islets are obtained of the same crystalline quality as the substrate.

Inventors

  • 👤 Yvon Gris
  • 👤 Agustin Monroy

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 11:56
CPC Classifications
H; H10; H10P; H10P90/00; H10P90/19; H10P90/1904; H10P90/1906; H10P14/00; H10P14/60; H10P14/61; H10W; H10W10/00; H10W10/01; H10W10/061; H10W10/10; H10W10/181; H10W10/011; H10W10/012; H10W10/021; H10W10/13; H10W10/20

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 225 words
A method for forming monocrystalline silicon islets isolated from the substrate on an integrated circuit, comprising the following steps: a. provision of a monocrystalline semi conductor wafer which is coated, possibly after thin oxidization, with a first layer of silicon nitride, b. etching the nitride with a pattern leaving zones of small width (FIG. 1), c. vertical hollowing out of the monocrystalline silicon outside the places protected by the nitride, so that monocrystalline silicon islets remain whose upper surface is coated with nitride (FIG. 2), d. deposition of the second silicon nitride layer which covers the surface of the wafer as well as the sides of the islet and the first nitride layer (FIG. 3), e. vertical anisotropic etchinq of the nitride until the silicon is bared outside the islets, the nitride of the second layer then remaining on the sides of the islets and that of the first layer remaining on the top of the islets (FIG. 4), f. isotropic etching of the bared silicon outside the islets protected by the nitride, this etching extending partially under the islets (FIG. 5), g. thick thermal oxidization of the wafer for a time sufficient for a silicon oxide layer to be formed extending completely under the islets and isolating them dielectrically from this substrate (FIG. 6), h. the nitride layer remaining on the islets is removed.
Claim 2
Independent Claim 225 words
A method for forming monocrystalline silicon islets isolated from the substrate on an integrated circuit, comprising the following steps: a. provision of a monocrystalline semi conductor wafer which is coated, possibly after thin oxidization, with a first layer of silicon nitride, b. etching the nitride with a pattern leaving zones of small width (FIG. 1), c. vertical hollowing out of the monocrystalline silicon outside the places protected by the nitride, so that monocrystalline silicon islets remain whose upper surface is coated with nitride (FIG. 2), d. deposition of the second silicon nitride layer which covers the surface of the wafer as well as the sides of the islet and the first nitride layer (FIG. 3), e. vertical anisotropic etchinq of the nitride until the silicon is bared outside the islets, the nitride of the second layer then remaining on the sides of the islets and that of the first layer remaining on the top of the islets (FIG. 4), f. isotropic etching of the bared silicon outside the islets protected by the nitride, this etching extending partially under the islets (FIG. 5), g. thick thermal oxidization of the wafer for a time sufficient for a silicon oxide layer to be formed extending completely under the islets and isolating them dielectrically from this substrate (FIG. 6), h. the nitride layer remaining on the islets is removed.
Claim 3
Dependent Claim 31 words
The method as claimed in claim 1, wherein the height h of the monocrystalline silicon islets, after step c, is at least about half of the width L of the islets.
Claim 4
Dependent Claim 31 words
The method as claimed in claim 1, wherein the etching depth p of the silicon in step f is substantially equal to a 1/4 of the width L of the islets.

References Cited (Backward Citations)

US4264382A Cited
US4502913A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1988-12-30 1989-07-01 1989-12-31 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1992-12-30 1993-07-01 1993-12-31 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1996-12-30 1997-07-01 1997-12-31 $7700.00 Window Closed / Lapsed

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