Apparatus and method for maintaining cache memory integrity in a shared memory environment

Claim 1

In a data processing system, the combination comprising: a shared memory; a dedicated memory; a first requestor capable of selectively reading data from an address in either said shared memory or said dedicated memory, said first requestor including a cache having a fast access time and a smaller storage capacity relative to said shared and dedicated memories; said cache being responsive to the reading of data from either said shared memory or said dedicated memory by said first requestor for storing the data read out from said shared memory in a manner so as to provide for rapid accessing thereof by said first requestor; said first requestor being operable to selectably access data from said cache and also to selectively invalidate data in said cache; and a second requestor capable of writing into a shared memory address which is accessible by said first requestor; said shared memory including monitoring and control means responsive to a request by said second requestor which writes into a shared memory address which is also currently stored in said cache to signal said first requestor to invalidate the data in said cache corresponding to this shared memory address; said monitoring and control means including an updatable address table memory for storing a shared memory address in response to the transferring of the data at this shared memory address from said shared memory to said cache; said monitoring and control means also including means for accessing said address table memory in response to said second requestor writing into a shared memory address so as to determine whether the shared memory address written into by said second requestor is also stored in said cache.