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US4288754A Expired / Lapsed US ⏱️ 0.0 years remaining

Filter circuit

Assignee: Sony Corp
•
Filing: 1979-09-24
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Granted: 1981-09-08
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Expires: 1999-09-24
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Abstract

Abstract A filter circuit, preferably a low-pass filter, whose cut-off frequency is easily controlled and which can be manufactured as an integrated circuit. First and second transistors are connected in differential amplifier configuration, and a current source is connected to the common connection of the emitter electrodes thereof. The base electrode of the first transistor is connected to an input terminal. A reactance element is connected between the collector electrode of the second transistor and a source of reference potential, such as ground. A third transistor has its emitter electrode connected to the base electrode of the second transistor and its base electrode connected to the collector electrode of the second transistor. An output terminal is connected to the emitter electrode of the third transistor.

Inventors

  • 👤 Takashi Okada
  • 👤 Yasunobu Kuniyoshi

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 15:14
CPC Classifications
H; H03; H03H; H03H11/00; H03H11/54; H03B; H03B5/00; H03B5/30; H03B5/32; H03B5/36; H03B5/366; H03G; H03G5/00; H03H11/02; H03H11/04; H03H11/12; H03H11/1213; H03H11/16; H03H11/20

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 208 words
A filter circuit, comprising an input terminal for receiving an input signal; first and second transistor means, each having base, emitter and collector electrodes, said first and second transistor means being connected in differential amplifier configuration and having their emitter electrodes connected to a common connection; variable current source means connected to said common connection; said input terminal being connected to the base electrode of said first transistor means; a source of reference potential; reactance means coupled between the collector electrode of said second transistor means and said source of reference potential; third transistor means having base, emitter and collector electrodes, the base electrode of said third transistor means being connected to the collector electrode of said second transistor means and the emitter electrode of said third transistor means being connected to the base electrode of said second transistor means; an additional current source connected to the emitter electrode of said third transistor means; resistance means connected between the emitter electrode of each of said first and second transistor means and said common connection; and an output terminal connected to the emitter electrode of said third transistor means, whereby the cut-off frequency of said filter circuit is a function of the current produced by said variable current source.
Claim 2
Dependent Claim 208 words
A filter circuit, comprising an input terminal for receiving an input signal; first and second transistor means, each having base, emitter and collector electrodes, said first and second transistor means being connected in differential amplifier configuration and having their emitter electrodes connected to a common connection; variable current source means connected to said common connection; said input terminal being connected to the base electrode of said first transistor means; a source of reference potential; reactance means coupled between the collector electrode of said second transistor means and said source of reference potential; third transistor means having base, emitter and collector electrodes, the base electrode of said third transistor means being connected to the collector electrode of said second transistor means and the emitter electrode of said third transistor means being connected to the base electrode of said second transistor means; an additional current source connected to the emitter electrode of said third transistor means; resistance means connected between the emitter electrode of each of said first and second transistor means and said common connection; and an output terminal connected to the emitter electrode of said third transistor means, whereby the cut-off frequency of said filter circuit is a function of the current produced by said variable current source.
Claim 3
Dependent Claim 12 words
The circuit of claim 1 wherein said reactance means comprises a capacitor.
Claim 4
Dependent Claim 20 words
The circuit of claim 1, further comprising another current source connected to the collector electrode of said second transistor means.
Claim 5
Dependent Claim 43 words
The circuit of claim 3 wherein said other current source comprises one of a pair of transistors connected as a current mirror circuit, the other of said pair of transistors being connected in series with the collector electrode of said first transistor means.
Claim 6
Dependent Claim 29 words
The circuit of claim 1 further comprising a current mirror circuit including a pair of transistors whose collector-emitter circuits are connected to said first and second transistor means, respectively.
Claim 7
Dependent Claim 35 words
The circuit of claim 1 wherein said variable current source comprises an additional transistor; and means for supplying a current-control signal to the base electrode of said additional transistor to control the current flowing therein.
Claim 8
Dependent Claim 12 words
The circuit of claim 1 wherein said resistance means comprises ohmic resistors.
Claim 9
Dependent Claim 30 words
The circuit of claim 1 wherein said resistance means comprises n diodes connected to the emitter electrode of each said first and second transistor means, wherein n is an integer.

References Cited (Backward Citations)

US3614478A Cited
US3969682A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1984-09-07 1985-03-09 1985-09-08 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1988-09-07 1989-03-09 1989-09-08 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1992-09-07 1993-03-09 1993-09-08 $7700.00 Window Closed / Lapsed

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