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US4243937A
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Microelectronic device and method for testing same
Assignee: Arris Technology Inc
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Filing: 1979-04-06
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Granted: 1981-01-06
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Expires: 1999-04-06
Abstract
Abstract A method for testing a microelectronic circuit to detect process defects which affect first and second characteristics of the circuit elements thereof. The circuit is formed on a semiconductor chip in proximity with an independent test element. The test element is not connected to and does not form a part of the circuit. The circuit elements are tested to detect process defects which affect the first characteristic thereof. The test element is tested to detect process defects which affect the second characteristics of both the circuit elements and the test element. The results of the test on the test element are relied on to determine the acceptability of the second characteristics of the circuit elements. The test on the test element for said second characteristic may be performed at the same time the circuit elements are being tested for said first characteristic.
Inventors
- 👤 Jagir S. Multani
- 👤 Jagtar S. Sandhu
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 03:11
CPC Classifications
G; G11; G11C; G11C29/00; G11C29/04; G11C29/50; G11C29/50016; G06; G06F; G06F2201/00; G06F2201/81; G11C16/00; G11C16/02; G11C16/04
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
96 words
A method for determining first and second distinct characteristics of a microelectronic circuit, the circuit being of the type which comprises circuit elements and is formed in proximity with an independent test element having a second characteristic representative of the second characteristic of said circuit elements, the method comprising the steps of: (a) testing at least one of said circuit elements for said first characteristic; and simultaneously (b) testing said test element for said second characteristic, whereby said second characteristic of said test element is relied on to represent said second characteristic of said circuit elements.
Claim 2
Independent Claim
96 words
A method for determining first and second distinct characteristics of a microelectronic circuit, the circuit being of the type which comprises circuit elements and is formed in proximity with an independent test element having a second characteristic representative of the second characteristic of said circuit elements, the method comprising the steps of: (a) testing at least one of said circuit elements for said first characteristic; and simultaneously (b) testing said test element for said second characteristic, whereby said second characteristic of said test element is relied on to represent said second characteristic of said circuit elements.
Claim 3
Dependent Claim
19 words
The method of claim 1 wherein said steps are performed during the wafer probing stage of microelectronic circuit manufacture.
Claim 4
Dependent Claim
14 words
The method of claim 1 wherein said microelectronic circuit comprises an electrically alterable memory.
Claim 5
Dependent Claim
13 words
The method of claim 3 wherein said independent test element is a transistor.
Claim 6
Dependent Claim
19 words
The method of claim 4 wherein said second characteristic is the data retention capability of the electrically alterable memory.
Claim 7
Dependent Claim
17 words
The method of claim 4 wherein said second characteristic is the endurance of the electrically alterable memory.
Claim 8
Dependent Claim
47 words
The method of claim 5 or 6 wherein the step of testing said transistor for said second characteristic comprises cycling said transistor through a predetermined number of write/erase cycles and determining, subsequent to said cycling, the threshold voltage variation of the transistor as a function of time.
Claim 9
Independent Claim
113 words
A method for testing the functionality and the data retention and endurance properties of an electrically alterable memory circuit, the circuit being of the type which comprises circuit elements and is formed in proximity with an independent test element, said test element having data retention and endurance properties representative of the data retention and endurance properties of said circuit elements, the method comprising the steps of: (a) testing said circuit elements for functionality; and simultaneously (b) testing said test element for its data retention and endurance properties, whereby the data retention and endurance properties of said test element are relied on to represent the data retention and endurance properties of said circuit elements.
Claim 10
Independent Claim
113 words
A method for testing the functionality and the data retention and endurance properties of an electrically alterable memory circuit, the circuit being of the type which comprises circuit elements and is formed in proximity with an independent test element, said test element having data retention and endurance properties representative of the data retention and endurance properties of said circuit elements, the method comprising the steps of: (a) testing said circuit elements for functionality; and simultaneously (b) testing said test element for its data retention and endurance properties, whereby the data retention and endurance properties of said test element are relied on to represent the data retention and endurance properties of said circuit elements.
Claim 11
Dependent Claim
42 words
In combination with a microelectronic circuit of the type having a plurality of circuit elements the improvement which comprises means for appraising a first characteristic of said circuit elements while the circuit elements are simultaneously being tested to determine a second characteristic.
Claim 12
Dependent Claim
42 words
In combination with a microelectronic circuit of the type having a plurality of circuit elements the improvement which comprises means for appraising a first characteristic of said circuit elements while the circuit elements are simultaneously being tested to determine a second characteristic.
Claim 13
Dependent Claim
23 words
The device of claim 9 wherein said means comprises an independent test element which is substantially identical to the circuit elements being tested.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1984-01-06 | 1984-07-07 | 1985-01-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1988-01-06 | 1988-07-07 | 1989-01-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1992-01-06 | 1992-07-07 | 1993-01-06 | $7700.00 | Window Closed / Lapsed |