Device for testing the operation of sequential integrated circuital units

Claim 1

An improved test device for electronic circuit units, having a plurality of input and output leads, and mounted on digital electronic apparatus, comprising a reference circuit unit similar to the circuit unit under test, at least a comparator circuit having two input and one output leads, means for temporarily and singularly connecting each input lead of a circuit unit under test to the corresponding lead of the reference circuit unit, and for connecting at least one output lead of said circuit unit under test to a first input lead of said comparator circuit; means for connecting the corresponding output lead of the reference circuit unit to the second input lead of said comparator circuit, the comparator circuit delivering a discordance signal whenever two signals of different binary level are applied to the input leads of said comparator circuit; timing means for transmitting only the discordance signals exceeding a predetermined time interval; means for memorizing the transmitted discordance signal, and means controlled by said memorizing means, for emitting an alarm signal, the improvement comprising a supervision circuit having input leads for receiving at least part of the signals applied to the input leads of the unit under test, and means for inhibiting the memorizing of said dicordance signal under control of signals delivered by said supervision circuit, said supervision circuit disabling said inhibiting means when the reference unit has received all signals needed for setting all memory elements comprised therein in the same state as the memory elements comprised in the unit under test in case of correct operation of the unit under test in response to the received signals.