Method of manufacturing semiconductor devices having improved alignment marks

Claim 1

A method of manufacturing a semiconductor device of a V-groove isolation structure type havng an alignment mark, said method comprising the steps of: forming an oxide layer on an epitaxial layer which is formed on a semiconductor substrate; forming an oxidation resistant masking layer on said oxide layer; selectively etching said masking layer to expose a part corresponding to a V-groove forming area and a part corresponding to an alignment mark area of said oxide layer; selectively etching said exposed part corresponding to said V-groove forming area of said oxide layer to expose a part of said epitaxial layer; anisotropically etching said exposed part of the epitaxial layer to form a V-groove; oxidizing the surface of said V-groove and a part of said epitaxial layer which lies under said exposed part of said oxide layer corresponding to said alignment mark area; filling said V-groove with polycrystalline silicon; Oxidizing said polycrystalline silicon and further oxidizing said part of said epitaxial layer which lies under said exposed part of said oxide layer to form said alignment mark; and removing the remaining masking layer.

Claim 2

A method of manufacturing a semiconductor device of a V-groove isolation structure type havng an alignment mark, said method comprising the steps of: forming an oxide layer on an epitaxial layer which is formed on a semiconductor substrate; forming an oxidation resistant masking layer on said oxide layer; selectively etching said masking layer to expose a part corresponding to a V-groove forming area and a part corresponding to an alignment mark area of said oxide layer; selectively etching said exposed part corresponding to said V-groove forming area of said oxide layer to expose a part of said epitaxial layer; anisotropically etching said exposed part of the epitaxial layer to form a V-groove; oxidizing the surface of said V-groove and a part of said epitaxial layer which lies under said exposed part of said oxide layer corresponding to said alignment mark area; filling said V-groove with polycrystalline silicon; Oxidizing said polycrystalline silicon and further oxidizing said part of said epitaxial layer which lies under said exposed part of said oxide layer to form said alignment mark; and removing the remaining masking layer.

Claim 4

The method of claims 1 or 2 comprising forming a plurality of buried layers in said substrate at predetermined locations.

Claim 5

The method of claims 1 or 2 comprising forming a plurality of buried layers at predetermined locations at the surface of said substrate adjacent to said epitaxial layer and etching said epitaxial layer to form said V-groove extending down to said substrate.