US4030038A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Multiple dumping integrator
Assignee: United States Department of the Navy
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Filing: 1976-02-27
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Granted: 1977-06-14
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Expires: 1996-02-27
Abstract
Abstract A multiple dumping integrator having several periodic dumping integrators,ll sharing the same analog-to-digital converter. A selector dumps each periodic dumping integrator in a regular sequence, choosing the longest running such integrator for the next dump.
Inventors
- 👤 Donald D. Daniel
- 👤 Roger V. Wilcox
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 05:19
CPC Classifications
G; G06; G06G; G06G7/00; G06G7/12; G06G7/18; H; H03; H03K; H03K27/00
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
66 words
A multiple dumping integrator comprising: a source of digital signals; a plurality of periodic dumping integrators connected in parallel having a common input effectively connect to said source of digital signals and individual outputs to simultaneously integrate input data; and an output selector having an input connected to the outputs of said periodic dumping integrators to sequentially select each of said outputs in turn for display.
Claim 2
Dependent Claim
66 words
A multiple dumping integrator comprising: a source of digital signals; a plurality of periodic dumping integrators connected in parallel having a common input effectively connect to said source of digital signals and individual outputs to simultaneously integrate input data; and an output selector having an input connected to the outputs of said periodic dumping integrators to sequentially select each of said outputs in turn for display.
Claim 3
Dependent Claim
98 words
A multiple dumping integrator as recited in claim 1 wherein each of said periodic dumping integrators comprises: means for adding connected to the output of said source of digital signals, the output of said adding means being connected as the input to said output selector; and a delay line connected to said adding means such that the output of said adding means is the input to said delay line, and the output of said delay line is added to the output of said converter, said delay line having a delay time such that said input data is integrated.
Claim 4
Dependent Claim
63 words
A multiple dumping integrator as recited in claim 1 in which said source of digital signals comprises an analog-to-digital con verter to convert input data into digital data having a plurality of parallel bits before said input data is input to said periodic dumping integrators, and wherein said adding means and said delay lines comprise digital circuits configured for processing said parallel bits.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1980-06-13 | 1980-12-13 | 1981-06-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1984-06-13 | 1984-12-13 | 1985-06-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1988-06-13 | 1988-12-13 | 1989-06-14 | $7700.00 | Window Closed / Lapsed |