US3903432A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Integration gate
Assignee: United States Department of the Navy
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Filing: 1974-08-07
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Granted: 1975-09-02
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Expires: 1994-08-07
Abstract
Abstract An integration gate for integrating an input during the period an enabling digital pulse is received, including a temperature stable reference voltage source, a differential amplifier providing two current paths for the input controlled by the digital pulse, wherein the first path dumps the input and the second path is to a bank of individually and selectively enabled, integrating storage capacitors which provides selectable integration periods.
Inventors
- 👤 John H Bumgardner
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 08:17
CPC Classifications
G; G11; G11C; G11C27/00; G11C27/02; G11C27/024; G11C27/026; G01; G01S; G01S13/00; G01S13/02; G01S13/06; G01S13/08; G01S13/10; G01S13/18
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
200 words
A circuit for precisely integrating a large dynamic range of electrical signals within a wide bandwidth, comprising: a source of temperature compensating electrical voltages; and at least one gated, electrical signal integrating means having a plurality of inputs, wherein the first input is coupled to the source of said electrical signals, the second is coupled to a source of gating electrical values, and the third and fourth are coupled to said source of electrical voltages, for electronically integrating said electrical signals during the period the gating values are received by said second input, including a differential amplifier providing alternate current paths through said means for said electrical signals, and a bank of capacitive paths wherein each path of said bank of paths provides a different integrating period, and each path of said bank is mutually exclusively selectable to couple the capacitance therein to the second of said alternate paths; wherein said electrical signals are conducted by the first of said alternate paths during the period that the gating values are not received, and by said second path during the period that the gating values are received, and the output of integrated signals is provided across said bank of capacitive paths.
Claim 2
Dependent Claim
200 words
A circuit for precisely integrating a large dynamic range of electrical signals within a wide bandwidth, comprising: a source of temperature compensating electrical voltages; and at least one gated, electrical signal integrating means having a plurality of inputs, wherein the first input is coupled to the source of said electrical signals, the second is coupled to a source of gating electrical values, and the third and fourth are coupled to said source of electrical voltages, for electronically integrating said electrical signals during the period the gating values are received by said second input, including a differential amplifier providing alternate current paths through said means for said electrical signals, and a bank of capacitive paths wherein each path of said bank of paths provides a different integrating period, and each path of said bank is mutually exclusively selectable to couple the capacitance therein to the second of said alternate paths; wherein said electrical signals are conducted by the first of said alternate paths during the period that the gating values are not received, and by said second path during the period that the gating values are received, and the output of integrated signals is provided across said bank of capacitive paths.
Claim 3
Dependent Claim
96 words
The circuit of claim 1 wherein said differential amplifier incLudes first and second transistors, each having an emitter, a collector and a base, wherein the emitters are coupled in common to said first input, the base of said first transistor is coupled to said second and said third inputs, the base of said second transistor is coupled to said fourth input, and the collector of said second transistor is coupled to said bank of capacitive paths, such that said first transistor provides said first path through said means and said second transistor provides said second path.
Claim 4
Dependent Claim
48 words
The circuit of claim 2 wherein said bank of capacitive paths includes a plurality of parallel coupled branches, each having a capacitor in series with an electrically controlled switch, such that when a switch is closed that branch is conductive, electrically coupling its capacitor into said second path.
Claim 5
Dependent Claim
110 words
The circuit of claim 3 wherein said source of electrical voltages includes a third transistor having an emitter, a collector, and a base, and servo means coupled to said collector and base of said third transistor for maintaining the voltage at the base of said second transistor of said means equal to the voltage at the base of said third transistor, wherein said emitter of said third transistor is coupled to the circuit common ground, and said collector is also coupled to a constant voltage source, and said servo means provides adjustable first and second temperature compensating outputs that are coupled to said third and fourth inputs of said means.
Claim 6
Dependent Claim
66 words
The circuit of claim 4 further including output circuitry coupled to said second path between said the collector of second transistor and said bank of capacitive paths, including an operational amplifier having its non-inverting terminal coupled to said second path, and a feedback network coupling a portion of the operational amplifier''s output to its inverting terminal, wherein the operational amplifier provides the output of the circuit.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-09-01 | 1979-03-03 | 1979-09-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-09-01 | 1983-03-03 | 1983-09-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-09-01 | 1987-03-03 | 1987-09-02 | $7700.00 | Window Closed / Lapsed |