Patent US4021646A successfully refreshed from Google Patents.
US4021646A
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Up/down counter with a tracking 5/6 input circuit
Assignee: EAGLE ACQUISITION Co
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Filing: 1975-10-01
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Granted: 1977-05-03
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Expires: 1995-10-01
Abstract
Abstract There is provided an improvement in a digital counting system including a digital counter which counts up when an incoming pulse is received on one terminal and counts down when an incoming pulse is received on another terminal and means for passing five of six incoming pulses to each of the terminals. This type of counting system is used in totalizing time when driven by a sixty cycle line current. The improvement is the provision of a sequence control means for both the up and down incoming pulses to inhibit one out of each six pulses at identical progressively totalized counting positions so that the up/down counter tracks identically as it is counting up and down.
Inventors
- 👤 Carl H. Meier
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-22 20:08
CPC Classifications
H; H03; H03K; H03K21/00; H03K21/02; H03K21/026; G; G04; G04F; G04F10/00; G04F10/04; H03K21/08; H03K23/00; H03K23/40; H03K23/50; H03K23/54; G05; G05B; G05B2219/00; G05B2219/20; G05B2219/24; G05B2219/24125; G05B2219/25; G05B2219/25045
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
338 words
In a digital system for totalizing time including a digital counter having a first input means for counting up upon receipt of a counting pulse and a second input means for counting down upon receipt of a counting pulse; an up count control means for creating a train of up counting pulses having a constant time base frequency of 120 pps; a down count control means for creating a train of down counting pulses having said time base frequency; first pulse passage means for passing five out of six of said up counting pulses to said first input means of said digital counter and for inhibiting one out of six pulses; second pulse passage means for passing five out of six of said down counting pulses to said second input means of said digital counter and for inhibiting one out of six pulses; and, means for preventing concurrent up and down counting of said digital counter; the improvement comprising: sequence control means for causing said first and second passage means to inhibit said one out of six pulses at identical progressively totalized count positions, said sequence control means including cycle means for repeatedly cycling through a series of six numbers, said cycling means being indexed from number-to-number by each of said counting pulses, means for causing said numerical cycling to be in a first numerical direction upon creating of each of said up counting pulses, means for causing said cycling to be in a second numerical direction opposite to said first numerical direction upon creating of each of said down counting pulses, means for inhibiting the up counting pulse immediately after a selected cycled number has been reached in said first numerical direction and means for inhibiting the down counting pulses immediately before said selected cycle number has been reached in said second numerical direction; and, means for converting sixty cycle per second line current to said train of up counting pulses and means for converting sixty cycle per second line current to said train of down pulses.
Claim 2
Dependent Claim
338 words
In a digital system for totalizing time including a digital counter having a first input means for counting up upon receipt of a counting pulse and a second input means for counting down upon receipt of a counting pulse; an up count control means for creating a train of up counting pulses having a constant time base frequency of 120 pps; a down count control means for creating a train of down counting pulses having said time base frequency; first pulse passage means for passing five out of six of said up counting pulses to said first input means of said digital counter and for inhibiting one out of six pulses; second pulse passage means for passing five out of six of said down counting pulses to said second input means of said digital counter and for inhibiting one out of six pulses; and, means for preventing concurrent up and down counting of said digital counter; the improvement comprising: sequence control means for causing said first and second passage means to inhibit said one out of six pulses at identical progressively totalized count positions, said sequence control means including cycle means for repeatedly cycling through a series of six numbers, said cycling means being indexed from number-to-number by each of said counting pulses, means for causing said numerical cycling to be in a first numerical direction upon creating of each of said up counting pulses, means for causing said cycling to be in a second numerical direction opposite to said first numerical direction upon creating of each of said down counting pulses, means for inhibiting the up counting pulse immediately after a selected cycled number has been reached in said first numerical direction and means for inhibiting the down counting pulses immediately before said selected cycle number has been reached in said second numerical direction; and, means for converting sixty cycle per second line current to said train of up counting pulses and means for converting sixty cycle per second line current to said train of down pulses.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1980-05-02 | 1980-11-01 | 1981-05-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1984-05-02 | 1984-11-01 | 1985-05-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1988-05-02 | 1988-11-01 | 1989-05-03 | $7700.00 | Window Closed / Lapsed |