Paging in hierarchical memory systems

Claim 1

A data processing arrangement including a processor and a storage configuration including a first and a relatively faster second store, wherein data is organized in each of said stores in at least one data class and wherein each data class is composed of at least one word block having a predetermined number of words of data, each having a plurality of word portions, the number of words in said second store being less than the number of words in said first store, comprising first means for supplying a predetermined word block address of a predetermined word block for addressing individual word blocks within said storage configuration; second means for storing said predetermined word block address; third means for storing addresses of word blocks stored in said second store; fourth means for comparing said stored predetermined word block address with said addresses stored in said third means, and for producing a selecting signal if said stored predetermined word block address does not correspond with said addresses stored in said third means; fifth means responsive to said selecting signal for effecting a transfer of said predetermined word block from said first store to said second store; sixth means responsive to said selecting signal for effecting a transfer of said predetermined word block address from said first means to said third means; and seventh means for supplying the individual word portions of the predetermined word block corresponding to said predetermined word block address to the input/output register of said second store; and eighth means responsive to the processor for writing a modified word portion in a word block in said second store.