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US3978472A Expired / Lapsed US ⏱️ 0.0 years remaining

Digital volt-ohmmeter

Assignee: International Business Machines Corp
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Filing: 1975-04-30
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Granted: 1976-08-31
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Expires: 1995-04-30
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Abstract

Abstract A low-cost but highly accurate ohmmeter for measuring milliohm resistances is disclosed. The instrument employs a digital voltmeter (analog-to-digital converter) having an add-subtract mode which nulls any drift voltage following each measurement. A self biasing current source which eliminates common mode voltages to the high gain amplifier portion of the converter is used for resistance measurements.

Inventors

  • 👤 Robert E. Jones

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 18:22
CPC Classifications
G; G01; G01R; G01R19/00; G01R19/25; G01R19/255; H; H03; H03M; H03M1/00; H03M1/06; H03M1/0602; H03M1/0604; H03M1/0607

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 336 words
An analog-to-digital converter comprising: high gain differential amplifier means for generating an output signal proportional to a voltage difference across its inputs, said output signal including a true and a drift voltage component, said high gain differential amplifier having offset adjustment means for adjusting the output voltage signal from said high gain differential amplifier so that said drift voltage component is always positive; clock and mode control logic means for generating clock pulses and control signals; a binary counter responsive to said clock pulses; a digital-to-analog converter connected to said binary counter for generating an analog voltage signal proportional to the binary count accumulated in said binary counter; comparator means responsive to said output and analog voltage signals for generating a compare signal when said voltage signals are equal, said binary counter being reset by said clock and mode control logic means each time a compare signal is generated by said comparator means; reversible counter means responsive to said clock pulses and operating synchronously with said binary counter for counting in a first direction, said clock and mode control logic means being responsive to said compare signal for stopping the counting operation of said reversible counter means whereby the accmulated count in said reversible counter means is a digital indication of the value of said true and drift voltage components; means responsive to said clock and mode control logic means for generating a null voltage across the inputs of said high gain amplifier means, said high gain amplifier means then generating an output voltage signal in response to null voltage which comprises only said drift voltage components; and said clock and mode control logic means again providing clock pulses to said binary counter and said reversible counter means, said reversible counter means counting in a second direction until said comparator means generates a compare signal when said drift voltage component and said analog voltage signal are equal, said reversible counter means thereby providing a digital output indication of the value of said true voltage component only.
Claim 2
Dependent Claim 336 words
An analog-to-digital converter comprising: high gain differential amplifier means for generating an output signal proportional to a voltage difference across its inputs, said output signal including a true and a drift voltage component, said high gain differential amplifier having offset adjustment means for adjusting the output voltage signal from said high gain differential amplifier so that said drift voltage component is always positive; clock and mode control logic means for generating clock pulses and control signals; a binary counter responsive to said clock pulses; a digital-to-analog converter connected to said binary counter for generating an analog voltage signal proportional to the binary count accumulated in said binary counter; comparator means responsive to said output and analog voltage signals for generating a compare signal when said voltage signals are equal, said binary counter being reset by said clock and mode control logic means each time a compare signal is generated by said comparator means; reversible counter means responsive to said clock pulses and operating synchronously with said binary counter for counting in a first direction, said clock and mode control logic means being responsive to said compare signal for stopping the counting operation of said reversible counter means whereby the accmulated count in said reversible counter means is a digital indication of the value of said true and drift voltage components; means responsive to said clock and mode control logic means for generating a null voltage across the inputs of said high gain amplifier means, said high gain amplifier means then generating an output voltage signal in response to null voltage which comprises only said drift voltage components; and said clock and mode control logic means again providing clock pulses to said binary counter and said reversible counter means, said reversible counter means counting in a second direction until said comparator means generates a compare signal when said drift voltage component and said analog voltage signal are equal, said reversible counter means thereby providing a digital output indication of the value of said true voltage component only.
Claim 3
Dependent Claim 88 words
An analog-to-digital converter as recited in claim 1, wherein said means for generating a null voltage comprises first switch pair means and second switch pair means, said first switch pair means being controlled by said clock and mode control logic means for connecting a voltage to be measured across the inputs of said high gain differential amplifier, and said second switch pair means being controlled by said clock and mode control logic means for connecting a ground reference potential across the inputs of said high gain differential amplifier.
Claim 4
Dependent Claim 39 words
An analog-to-digital converter as recited in claim 1 further comprising self biasing current source means for supplying current to a resistor of unknown resistance value, said resistor being connected across the input terminals of said high gain amplifier means.
Claim 5
Dependent Claim 43 words
An analog-to-digital converter as recited in claim 3 wherein said self biasing means comprises a current source adapted to be connected to one terminal of said resistor and a virtual ground circuit adapted to be connected to the other terminal of said resistor.
Claim 6
Dependent Claim 63 words
An analog-to-digital converter as recited in claim 4 wherein said virtual ground circuit comprises a second differential amplifier having positive and negative inputs, and positive input being connected to circuit ground and said negative input being connected to the output of said second differential amplifier, the output of said second differential amplifier adapted to be connected to said other terminal of said resistor.
Claim 7
Independent Claim 269 words
A method of providing a digital indication of an analog input voltage comprising: connecting said analog input voltage across the input of a high gain differential amplifier to generate at the output of said high gain differential amplifier a voltage signal including true and drift voltage components; adjusting the output voltage signal from said high gain differential amplifier so that said drift voltage component is always positive; generating clock pulses; counting said clock pulses in a binary counter; generating an analog voltage signal proportional to the binary count accumulated in said binary counter; comparing the output of said high gain differential amplifier with said analog voltage signal and generating a first compare signal when said analog voltage signal is equal to the output voltage signal of said high gain differential amplifier; synchronously counting in an up/down counter in a first direction while generating said analog voltage signal until said first compare signal is generated, the count accumulated in said up/down counter at the time of generation of said first compare signal being a digital representation of the value of said true and drift voltage components; connecting a null voltage across the inputs of said high gain differential amplifier so that its otuput signal comprises only said drift voltage component; and again counting clock pulses in said binary counter and generating an analog voltage signal and synchronously counting in said up/down counter in the opposite direction until a second compare signal is generated, the count accumulated in said up/down counter at the time of the generation of said second compare signal being the value of said true voltage component only.
Claim 8
Independent Claim 269 words
A method of providing a digital indication of an analog input voltage comprising: connecting said analog input voltage across the input of a high gain differential amplifier to generate at the output of said high gain differential amplifier a voltage signal including true and drift voltage components; adjusting the output voltage signal from said high gain differential amplifier so that said drift voltage component is always positive; generating clock pulses; counting said clock pulses in a binary counter; generating an analog voltage signal proportional to the binary count accumulated in said binary counter; comparing the output of said high gain differential amplifier with said analog voltage signal and generating a first compare signal when said analog voltage signal is equal to the output voltage signal of said high gain differential amplifier; synchronously counting in an up/down counter in a first direction while generating said analog voltage signal until said first compare signal is generated, the count accumulated in said up/down counter at the time of generation of said first compare signal being a digital representation of the value of said true and drift voltage components; connecting a null voltage across the inputs of said high gain differential amplifier so that its otuput signal comprises only said drift voltage component; and again counting clock pulses in said binary counter and generating an analog voltage signal and synchronously counting in said up/down counter in the opposite direction until a second compare signal is generated, the count accumulated in said up/down counter at the time of the generation of said second compare signal being the value of said true voltage component only.

References Cited (Backward Citations)

US3438024A Cited
US3445839A Cited
US3510603A Cited
US3711850A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1979-08-31 1980-03-01 1980-08-31 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1983-08-31 1984-03-01 1984-08-31 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1987-08-31 1988-03-01 1988-08-31 $7700.00 Window Closed / Lapsed

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