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US3882386A Expired / Lapsed US ⏱️ 0.0 years remaining

Device for testing operation of integrated circuital units

Assignee: Bull HN Information Systems Italia SpA
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Filing: 1972-03-10
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Granted: 1975-05-06
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Expires: 1992-03-10
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Abstract

Abstract A device for testing integrated circuit units is provided having means for connecting to the unit under test and for comparing the out-going signals of the unit with the outgoing signal of a reference unit in a manner to detect a difference in the logic operation of the unit under test with respect to the reference unit to detect failures. A timing circuit prevents emission of a failure signal due to differences in output caused by differences in signal propagation delay times between the unit under test and the reference unit.

Inventors

  • 👤 Mario Vinsani

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-22 20:52
CPC Classifications
G; G01; G01R; G01R1/00; G01R1/02; G01R1/04; G01R1/0408; G01R1/0425; G01R31/00; G01R31/28; G01R31/317; G01R31/3181; G01R31/319; G01R31/3193; G01R31/31937

Claims Analysis

Total Claims: 19
Claim 1
Independent Claim 255 words
A test device for testing minimal replaceable electronic circuit units which are normally mechanically mounted and electrically connected within an operating digital electronic system, said circuit units each having a plurality of input and output leads, said test device being operative without removing said circuit units from said system and while said system continues to supply system-generated input signals to said input leads of said circuit units, comprising: a reference circuit, extrinsic to said system and identical to the circuit under test; at least a comparator circuit having two inputs and one output; connector means for temporarily and singularly connecting said input lead terminal of said circuit unit under test to the corresponding input lead terminal of the reference circuit unit placing said input leads in parallel connection to receive said system-generated input signals from said digital electronic system and for connecting at least one output terminal of said circuit unit under test to a first input terminal of the comparator circuit; means for connecting the corresponding output terminal of the reference circuit unit to the second input terminal of said comparator circuit, in such a way, that a discordant signal of a predetermined binary level is present at the output of said comparator circuit whenever two signals of two different binary levels are present at the inputs of said comparator circuit; timing means for permitting the detection of said discordant signal only in case it exceeds a predetermined duration; means for memorizing said detected discordant signal; anD alarm means controlled by said memorizing means.
Claim 2
Dependent Claim 255 words
A test device for testing minimal replaceable electronic circuit units which are normally mechanically mounted and electrically connected within an operating digital electronic system, said circuit units each having a plurality of input and output leads, said test device being operative without removing said circuit units from said system and while said system continues to supply system-generated input signals to said input leads of said circuit units, comprising: a reference circuit, extrinsic to said system and identical to the circuit under test; at least a comparator circuit having two inputs and one output; connector means for temporarily and singularly connecting said input lead terminal of said circuit unit under test to the corresponding input lead terminal of the reference circuit unit placing said input leads in parallel connection to receive said system-generated input signals from said digital electronic system and for connecting at least one output terminal of said circuit unit under test to a first input terminal of the comparator circuit; means for connecting the corresponding output terminal of the reference circuit unit to the second input terminal of said comparator circuit, in such a way, that a discordant signal of a predetermined binary level is present at the output of said comparator circuit whenever two signals of two different binary levels are present at the inputs of said comparator circuit; timing means for permitting the detection of said discordant signal only in case it exceeds a predetermined duration; means for memorizing said detected discordant signal; anD alarm means controlled by said memorizing means.
Claim 3
Dependent Claim 14 words
The testing device of claim 1, wherein said timing means comprises a delay line.
Claim 4
Dependent Claim 15 words
The testing device of claim 1, wherein said timing means comprise a capacitor-resistor integrating circuit.
Claim 5
Dependent Claim 16 words
The testing device of claim 1, wherein said timing means comprise at least a monostable circuit.
Claim 6
Dependent Claim 29 words
The testing device of claim 1, wherein said conductor means comprises a gripping means provided with contact means for applying said contact means to said terminals with sufficient pressure.
Claim 7
Dependent Claim 56 words
The testing device of claim 1, comprising a plurality of test circuits, each one including a comparator circuit and a timing means, for simultaneously effecting the testing of a plurality of said minimal replaceable circuit units comprised in a common group of circuit units, and a memorizing means and alarm means common to all testing circuits.
Claim 8
Dependent Claim 64 words
A testing device as claimed in claim 1, comprising a plurality of comparator circuits for simultaneously effecting the comparison between binary levels of the outputs of a plurality of elementary circuits of the unit under test and corresponding outputs of the elementary circuit of the reference unit, and a timing means, a memorizing means and an alarm means, common to all said comparator circuits.
Claim 9
Dependent Claim 31 words
A testing device as in claim 1 comprising switching means for permitting the connection in sequence of different reference integrated circuit units, for testing integrated circuit units of different corresponding types.
Claim 10
Dependent Claim 78 words
A testing device as claimed in claim 8, whereby said switching means comprise a plug socket integral with said testing device, and a plurality of pin supports singularly pluggable into said plug socket, each pin support being integral to a reference circuit unit, suitable connections being made therein between the leads of said reference unit and the pins, and between the pins themselves, for effecting the required switching operation by plugging the pin support into the plug socket.
Claim 11
Dependent Claim 39 words
A testing device as claimed in claim 8, whereby said switching means is effective to suitably change the time characteristics of said timing means to adjust said time characteristics in reference to the possible duration of the discordant signal.
Claim 12
Dependent Claim 77 words
A testing device as in claim 1 comprising, in combination, a plurality of circuits for testing the voltage levels of the leads of the circuit unit under test, each one of said circuits for voltage testing comprising two threshold devices characterized by two different threshold voltage values, and a logic unit for giving out a determined binary level whenever the voltage applied to the input of said voltage testing circuit is comprised between said two threshold values.
Claim 13
Dependent Claim 95 words
The testing device of claim 11, wherein each one of said threshold device comprising a differential amplifier, at a first output of said differential amplifier being applied to the voltage present on a lead of the unit under test, at a second input of said differential amplifier being applied a threshold voltage of substantially constant value, a signal of a first, respectively, a second binary level being present at the output of said differential amplifier whenever the voltage applied to said first input is higher, respectively, lower than the voltage applied to said second input.
Claim 14
Dependent Claim 252 words
A test device for testing minimal replaceable electronic units, said electronic units being normally mechanically mounted and electrically connected within an operating digital electronic system each of said electronic units having a plurality of input and output leads, said test device being operative without removing said electronic unit from said system and while said system continues to supply system-generated input signals to said input leads of said units comprising: a reference circuit unit, extrinsic to said system, identical to the unit which is to be tested; at least one comparator circuit having two inputs and one output; a gripping means for temporarily and singularly connecting each input lead of a circuit unit under test to the corresponding input lead of the reference circuit placing said input leads in parallel connection to receive said input signals from said digital electronic system and for connecting at least one output of said circuit unit under test to a first input of the comparator circuit; means for connecting the corresponding output of the reference circuit unit to be second input of said comparator circuit, in such a way, that a discordant signal of a predetermined binary level is present at the output of said comparator circuit whenever two signals of two different binary levels are present at the inputs of said comparator circuit; timing means including a monostable circuit for detection of said discordant signal only when it exceeds a predetermined duration; means for memorizing said discordant signal and alarm means controlled by said memorizing means.
Claim 15
Dependent Claim 252 words
A test device for testing minimal replaceable electronic units, said electronic units being normally mechanically mounted and electrically connected within an operating digital electronic system each of said electronic units having a plurality of input and output leads, said test device being operative without removing said electronic unit from said system and while said system continues to supply system-generated input signals to said input leads of said units comprising: a reference circuit unit, extrinsic to said system, identical to the unit which is to be tested; at least one comparator circuit having two inputs and one output; a gripping means for temporarily and singularly connecting each input lead of a circuit unit under test to the corresponding input lead of the reference circuit placing said input leads in parallel connection to receive said input signals from said digital electronic system and for connecting at least one output of said circuit unit under test to a first input of the comparator circuit; means for connecting the corresponding output of the reference circuit unit to be second input of said comparator circuit, in such a way, that a discordant signal of a predetermined binary level is present at the output of said comparator circuit whenever two signals of two different binary levels are present at the inputs of said comparator circuit; timing means including a monostable circuit for detection of said discordant signal only when it exceeds a predetermined duration; means for memorizing said discordant signal and alarm means controlled by said memorizing means.
Claim 16
Dependent Claim 55 words
The testing device of claim 13, comprising a plurality of test circuits, each one including a comparator circuit and timing means, for simultaneously effecting the testing of a plurality of said minimal replaceable circuit units comprised in a common group of circuit units, and a memorizing means and alarm means common to all testing circuits.
Claim 17
Dependent Claim 67 words
A testing device as claimed in claim 13, comprising a plurality of comparator circuits for effecting at the same time the comparison between binary levels of the outputs of a plurality of elementary circuits of the unit under test and corresponding outputs of the elementary circuits of the reference unit, and a timing means, a memorizing means and an alarm means, common to all said comparator circuits.
Claim 18
Dependent Claim 31 words
A testing device as in claim 15 comprising switching means for permitting the connection in sequence of different reference integrated circuits units, for testing integrated circuit units of different corresponding types.
Claim 19
Dependent Claim 39 words
A testing device as claimed in claim 16, whereby said switching means is effective to suitably change the time characteristics of said timing means to adjust said time characteristics in reference to the possible duration of the discordant signal.

References Cited (Backward Citations)

US3286175A Cited
US3624372A Cited
US3614608A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1978-05-05 1978-11-04 1979-05-06 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1982-05-05 1982-11-04 1983-05-06 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1986-05-05 1986-11-04 1987-05-06 $7700.00 Window Closed / Lapsed

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