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US3876952A Expired / Lapsed US ⏱️ 0.0 years remaining

Signal processing circuits for charge-transfer, image-sensing arrays

Assignee: RCA Corp
•
Filing: 1973-05-02
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Granted: 1975-04-08
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Expires: 1993-05-02
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Abstract

Abstract During the serial shifting to an output buffer of the radiation induced charge signal accumulated in a row (or column) of an array, the successive signals are processed to improve the contrast of the sensed image. The portion of each signal of greater than a given amplitude is transmitted to a buffer stage and the remaining portion of each signal is removed. In one form of the invention, the signal-to-noise ratio is then enhanced at the expense of resolution by combining at the buffer the processed signal from a number of adjacent charge storage locations.

Inventors

  • 👤 Paul Kessler Weimer

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 18:50
CPC Classifications
G; G11; G11C; G11C27/00; G11C27/04; H; H04; H04N; H04N25/00; H04N25/70; H04N25/71; H04N25/745; H04N25/76; H04N25/767; H04N25/7795; H10; H10D; H10D84/00; H10D84/891; H10D84/895

Claims Analysis

Total Claims: 3
Claim 1
Independent Claim 131 words
In combination: a charge storage register having a plurality of stages; another charge storage stage; a following stage; a charge accumulation stage; means for transferring charge signal from stage-to-stage of said register, and for concurrently transferring, at the same rate, the charge signal stored in said another charge storage stage to said following stage; means for transferring only that portion of each charge signal of greater than a given amplitude reaching the last stage of said register to said charge accumulation stage and the remaining portion of ech charge signal to said another charge storage stage; and means for transferring the charge signal accumulated in said accumulation stage to said another stage after each N transfers of charge signal to said accumulation stage, whre N is an interger greater than 1.
Claim 2
Dependent Claim 131 words
In combination: a charge storage register having a plurality of stages; another charge storage stage; a following stage; a charge accumulation stage; means for transferring charge signal from stage-to-stage of said register, and for concurrently transferring, at the same rate, the charge signal stored in said another charge storage stage to said following stage; means for transferring only that portion of each charge signal of greater than a given amplitude reaching the last stage of said register to said charge accumulation stage and the remaining portion of ech charge signal to said another charge storage stage; and means for transferring the charge signal accumulated in said accumulation stage to said another stage after each N transfers of charge signal to said accumulation stage, whre N is an interger greater than 1.
Claim 3
Dependent Claim 19 words
In the combination as set forth in claim 1, said charge storage register comprising one of the bucket-brigade type.

References Cited (Backward Citations)

US3643106A Cited
US3737683A Cited
US3771149A Cited
US3777186A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1978-04-07 1978-10-07 1979-04-08 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1982-04-07 1982-10-07 1983-04-08 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1986-04-07 1986-10-07 1987-04-08 $7700.00 Window Closed / Lapsed

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