US3873371A
Expired / Lapsed
US
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Small geometry charge coupled device and process for fabricating same
Assignee: Raytheon Co
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Filing: 1972-11-07
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Granted: 1975-03-25
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Expires: 1992-11-07
Abstract
Abstract A metal-oxide-semiconductor (MOS) charge coupled device (CCD) and process for fabricating same wherein initially a selected metallization pattern is formed atop an insulating coating on a semiconductor substrate, and thereafter P or N type ions are implanted through openings in the metallization pattern to form doped regions in the semiconductor substrate, such as ''''channel stop'''' regions of a CCD. The ions are implanted at a predetermined angle with respect to the plane of the metallization pattern, so that this angle and the size of the openings in the metallization pattern determine the location of the particular region of the semiconductor substrate into which the ions pass. Thus, the requirement for a separate masking step especially for the purpose of forming these doped regions has been eliminated.
Inventors
- 👤 Edward D Wolf
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 19:58
CPC Classifications
H; H10; H10D; H10D44/00; H10D44/40; H10D44/45; H10D44/472; H10D62/00; H10D62/10; H10D62/17; H10D62/213; H10D62/335; H10P; H10P95/00
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
103 words
A PROCESS FOR FABRICATING A SEMICONDUCTOR STRUCTURE HAVING A CHANNEL REGION THEREIN FOR BLOCKING THE LATERAL FLOW OF CHARGE CARRIERS, INCLUDING THE STEPS OF: A. FORMING AN OXIDE COATING ON THE SURFACE OF A SEMICONDUCTOR SUBSTRATE, B. FORMING A RESIST COATING ON SAID OXIDE COATING, C. DEVELOPING SELECTED AREAS OF SAID RESIST COATING TO THEREBY FORM A RESIST PATTERN, D. DEPOSITING A METAL FILM ON THE EXPOSED AREAS OF BOTH SAID OXIDE COATING AND SAID RESIST PATTERN, E. REMOVING SAID RESIST PATTERN TO THEREBY SIMULTANEOUSLY REMOVE THE PORTIONS OF SAID METAL FILM LYING THEREON, WHEREBY OPENINGS ARE FORMED IN SAID METAL FILM, AND
Claim 2
Dependent Claim
103 words
A PROCESS FOR FABRICATING A SEMICONDUCTOR STRUCTURE HAVING A CHANNEL REGION THEREIN FOR BLOCKING THE LATERAL FLOW OF CHARGE CARRIERS, INCLUDING THE STEPS OF: A. FORMING AN OXIDE COATING ON THE SURFACE OF A SEMICONDUCTOR SUBSTRATE, B. FORMING A RESIST COATING ON SAID OXIDE COATING, C. DEVELOPING SELECTED AREAS OF SAID RESIST COATING TO THEREBY FORM A RESIST PATTERN, D. DEPOSITING A METAL FILM ON THE EXPOSED AREAS OF BOTH SAID OXIDE COATING AND SAID RESIST PATTERN, E. REMOVING SAID RESIST PATTERN TO THEREBY SIMULTANEOUSLY REMOVE THE PORTIONS OF SAID METAL FILM LYING THEREON, WHEREBY OPENINGS ARE FORMED IN SAID METAL FILM, AND
Claim 3
Dependent Claim
43 words
The process defined in claim 1 wherein said resist pattern is an electron beam resist material which is developed by focusing an electron beam on selected areas thereof to achieve very narrow line widths in the fabrication of very small geometry semiconductor devices.
Claim 4
Dependent Claim
93 words
The process defined in claiam 1 which further includes: a. forming said oxide coating with a thickness which approaches the width of the opening in said metallization pattern, and b. controlling the angle at which said ions are accelerated through said opening in said metallization pattern, whereby the depth and lateral position of ion implanted regions may be controlled by varying either said angle, the openings in said metallization pattern, the oxide thickness, or the metallization thickness, or a combination of the latter, thereby imparting substantial process control and flexibility to said process.
Claim 5
Dependent Claim
93 words
The process defined in claiam 1 which further includes: a. forming said oxide coating with a thickness which approaches the width of the opening in said metallization pattern, and b. controlling the angle at which said ions are accelerated through said opening in said metallization pattern, whereby the depth and lateral position of ion implanted regions may be controlled by varying either said angle, the openings in said metallization pattern, the oxide thickness, or the metallization thickness, or a combination of the latter, thereby imparting substantial process control and flexibility to said process.
Claim 6
Dependent Claim
136 words
In a process for fabricating a metal-oxide-semiconductor field effect structure wherein a gate metallization pattern is deposited in a predetermined spaced relationship above the surface of a semiconductor body, so that a voltage applied to said gate metallization serves to control the electric field in said semiconductor body and the flow of charge carriers therein, the improvement comprising accelerating conductivity-type determining ions through openings in said metallization pattern and at a preselected angle with respect to the planar surface of said metallization pattern, whereby said ions are projected into a region of said semiconductor body beneath said metallization pattern and there serve as a channel stop or carrier blocking region, and a separate masking step other than the step forming said gate metallization pattern is not required for forming said channel stop or carrier blocking region.
Claim 7
Dependent Claim
136 words
In a process for fabricating a metal-oxide-semiconductor field effect structure wherein a gate metallization pattern is deposited in a predetermined spaced relationship above the surface of a semiconductor body, so that a voltage applied to said gate metallization serves to control the electric field in said semiconductor body and the flow of charge carriers therein, the improvement comprising accelerating conductivity-type determining ions through openings in said metallization pattern and at a preselected angle with respect to the planar surface of said metallization pattern, whereby said ions are projected into a region of said semiconductor body beneath said metallization pattern and there serve as a channel stop or carrier blocking region, and a separate masking step other than the step forming said gate metallization pattern is not required for forming said channel stop or carrier blocking region.
References Cited (Backward Citations)
US2666814A
Cited
US2588254A
Cited
US2900277A
Cited
US3113896A
Cited
US3558366A
Cited
US3622382A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-03-24 | 1978-09-23 | 1979-03-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-03-24 | 1982-09-23 | 1983-03-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-03-24 | 1986-09-23 | 1987-03-25 | $7700.00 | Window Closed / Lapsed |