High voltage amplifier

Claim 2

An amplifier circuit comprising: first and second output transistors; first and second light-emitting sources; the first and second light-emitting sources being coupled to the first and second output transistors respectively; and circuit means electrically connected to the first and second light-emitting sources for biasing both sources to cause simultaneous emission light from both sources at a preselected time and to cause prior to and subsequent to the simultaneous emission the second source to emit light and to inhibit light emission from the first source such that conduction occurs in only one of the two output transistors at a time.

Claim 3

The apparatus of claim 1 wherein the first and second output transistors are both npn-type junction photo transistors.

Claim 4

The apparatus of claim 2 wherein the first circuit means comprises a two-input NAND gate and a two-input OR gate; the outputs of the NAND and OR gates being electrically connected to the first and second light-emitting sources, respectively; the first input of the NAND and OR gate being electrically connected together; an input terminal being electrically connected to the common first input of the NAND and OR gates; and a delay circuit electrically connected between the input terminal and each second input of the NAND and OR gates.

Claim 5

The apparatus of claim 1 wherein the first and second output transistors are complementary junction transistors.

Claim 6

The apparatus of claim 4 further comprising second and third circuit means being adapted to be responsive to light emitted from the first and second light-emitting sources, respectively; and the second circuit means being electrically connected to the first output transistor and the third circuit means being electrically connected to the second output transistor.

Claim 7

A high voltage pulse amplifier comprising: first and second complementary junction transistors, the collectors of said transistors being electrically connected together; first and second phototransistors, the collectors of the phototransistors being electrically connected to the bases of the first and second transistors, respectively; the emitter of the second phototransistor being electrically connected to the emitter of the second transistor; first and second light-emitting diodes; the first diode being physically located with respect to the first phototransistor such that light emitted from the first diode is received on a photosensitive area of the first phototransistor; the second diode being physically located with respect to the first phototransistor such that light emitted from the second diode is received on a photosensitive area of the second phototransistor; and circuit means electrically connected to the first and second diodes for biasing both diodes to cause simultaneous emission of light from both diodes at a preselected time and to cause prior to and subsequent to the simultaneous emission the second diode to emit light and to inhibit light emission from the first diode such that conduction occurs in only one of the two complementary junction transistors at a time.

Claim 8

A high voltage pulse amplifier comprising: first and second complementary junction transistors, the collectors of said transistors being electrically connected together; first and second phototransistors, the collectors of the phototransistors being electrically connected to the bases of the first and second transistors, respectively; the emitter of the second phototransistor being electrically connected to the emitter of the second transistor; first and second light-emitting diodes; the first diode being physically located with respect to the first phototransistor such that light emitted from the first diode is received on a photosensitive area of the first phototransistor; the second diode being physically located with respect to the first phototransistor such that light emitted from the second diode is received on a photosensitive area of the second phototransistor; and circuit means electrically connected to the first and second diodes for biasing both diodes to cause simultaneous emission of light from both diodes at a preselected time and to cause prior to and subsequent to the simultaneous emission the second diode to emit light and to inhibit light emission from the first diode such that conduction occurs in only one of the two complementary junction transistors at a time.

Claim 9

The apparatus of claim 6 wherein the first circuit means comprises: a two-input NAND gate; a two-input NOR gate; the output of the NAND gate being electrically connected to the first light-emitting diode; the output of the NOR gate being electrically connected to the second light-emitting diode; the first input of the NAND and NOR gates being electrically connecTed together; an input terminal being electrically connected to the common first inputs of the logic gates; and a delay circuit electrically connected between the input terminal and the second inputs to the gates.

Claim 10

The apparatus of claim 7 wherein the first transistor is a pnp-type junction transistor and the second transistor is an npn-type junction transistor.

Claim 11

The apparatus of claim 8 wherein: the delay circuit comprises a first resistor and a capacitor; the resistor and capacitor being electrically connected to the second inputs of the gates; and the resistor also being electrically connected to the first inputs of the NAND and NOR gates.

Claim 12

The apparatus of claim 9 further comprising: a second resistor electrically connected between the emitter and base of the first transistor; and a third resistor electrically connected to the emitter of the first phototransistor.

Claim 13

The apparatus of claim 10 further comprising: a fourth resistor electrically connected to the collector of the second phototransistor; a fifth resistor electrically connected to the anode of the first light-emitting diode; and a sixth resistor electrically connected to the anode of the second light-emitting diode.

Claim 14

In combination: at least one high voltage amplifier comprising: first and second complementary junction transistors, the collectors of said transistors being electrically connected together; first and second phototransistors, the collectors of the phototransistors being electrically connected to the bases of the first and second transistors, respectively; the emitter of the second phototransistor being electrically connected to the emitter of the second transistor; first and second light-emitting diodes; a two-input NAND gate; a two-input NOR gate; the output of the NAND gate being electrically connected to the first light-emitting diode; the output of the NOR gate being electrically connected to the second light-emitting diode; the first input of each of the NAND and NOR gates being electrically connected together; an input terminal being electrically connected to the common first inputs to the gates; a delay circuit electrically connected between the input terminal and the second inputs of the gates; and at least one piezoelectric element electrically connected to the amplifier.

Claim 15

In combination: at least one high voltage amplifier comprising: first and second complementary junction transistors, the collectors of said transistors being electrically connected together; first and second phototransistors, the collectors of the phototransistors being electrically connected to the bases of the first and second transistors, respectively; the emitter of the second phototransistor being electrically connected to the emitter of the second transistor; first and second light-emitting diodes; a two-input NAND gate; a two-input NOR gate; the output of the NAND gate being electrically connected to the first light-emitting diode; the output of the NOR gate being electrically connected to the second light-emitting diode; the first input of each of the NAND and NOR gates being electrically connected together; an input terminal being electrically connected to the common first inputs to the gates; a delay circuit electrically connected between the input terminal and the second inputs of the gates; and at least one piezoelectric element electrically connected to the amplifier.