Patent US3827027A successfully refreshed from Google Patents.
US3827027A
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Method and apparatus for producing variable formats from a digital memory
Assignee: Texas Instruments Inc
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Filing: 1971-09-22
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Granted: 1974-07-30
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Expires: 1991-09-22
Abstract
Abstract A method and system are disclosed in which radar data are collected, integrated to improve the signal quality and stored in a random access digital memory. The addressing sequences for storing the data in the digital memory are selected such that the data can be read and used to update a display without requiring complicated transformations of the address sequences used to store the data into the address sequences for reading the data. The digital memory also provides true freeze mode operation of the display. The system can also be used to display infrared scanner data.
Inventors
- 👤 G Towson
- 👤 J Koberlein
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 08:09
CPC Classifications
G; G01; G01S; G01S7/00; G01S7/02; G01S7/04; G01S7/06; G01S7/10; G01S7/12; G01S7/14; G01S7/28; G01S7/285; G01S7/295; G01S7/298
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
214 words
In a display system receiving antenna position information and video signals for digitization, wherein an analog to digital converter and digital integrator digitizes and integrates the video signals into composite signals for a buffer memory and produces a buffer full signal and wherein a buffer memory stores the composite signals for each azimuth segment scan for display by cathode ray tube, the combination with said buffer memory of a read/write control logic circuit, a random access digital memory and a read/write address means having independent counters operably responsive to the read/write control logic circuit upon receipt of the buffer full signal for producing separate sequences to provide distinct formats for transferring in a write sequence the composite signals stored in the buffer memory into a plurality of sequential locations in the random access digital memory with the antenna position information from the radar indicating the azimuth scan segment associated with the composite signals being transferred, and reading from the random access digital memory in a read sequence distinct from that of the write sequence the composite signals for display whereby, for example, the data are collected in the polar coordinate system in one Manner and read out of the random access digital memory in a different manner and displayed in the polar coordinate system.
Claim 2
Dependent Claim
214 words
In a display system receiving antenna position information and video signals for digitization, wherein an analog to digital converter and digital integrator digitizes and integrates the video signals into composite signals for a buffer memory and produces a buffer full signal and wherein a buffer memory stores the composite signals for each azimuth segment scan for display by cathode ray tube, the combination with said buffer memory of a read/write control logic circuit, a random access digital memory and a read/write address means having independent counters operably responsive to the read/write control logic circuit upon receipt of the buffer full signal for producing separate sequences to provide distinct formats for transferring in a write sequence the composite signals stored in the buffer memory into a plurality of sequential locations in the random access digital memory with the antenna position information from the radar indicating the azimuth scan segment associated with the composite signals being transferred, and reading from the random access digital memory in a read sequence distinct from that of the write sequence the composite signals for display whereby, for example, the data are collected in the polar coordinate system in one Manner and read out of the random access digital memory in a different manner and displayed in the polar coordinate system.
Claim 3
Dependent Claim
117 words
In a display system according to claim 1, wherein the read/write address means comprises: a range cell counter and an azimuth counter, and a read address position indicating storage means, said range cell counter and azimuth counter providing write addresses for the storage of composite signals in the random access digital memory upon receipt of the buffer full condition signals and read addresses upon the absence of a full buffer condition signal, and said read address position indicating storage means storing the read address at which the cathode ray tube display was interrupted whereby the cathode ray tube display is restarted from the point where interrupted for the storage of data in the random access digital memory.
Claim 4
Dependent Claim
80 words
In a display system according to claim 1, wherein the read/write address means comprises: write range cell and azimuth counters and read azimuth and range cell counters, said write range cell and azimuth counters upon receipt of a buffer full condition signal providing coordinate address sequences for the storage of composite signals in the random access digital memory, and said read azimuth and range cell counters providing read addresses for reading the composite signals from the random access digital memory.
Claim 5
Dependent Claim
189 words
In a display system according to claim 3, wherein the write counters provide address words for writing the composite signals of the buffer memory into the random access digital memory, the address words comprising word segments for a first group of addresses corresponding to the azimuth scans and word segments for a second group of addresses corresponding to the plurality of range scan segments for each azimuth scan, and the read counters provide read address words comprising word segments for a first group of read addresses corresponding to the range scans and word segments for a second group of addresses corresponding to the plurality of azimuth scan segments, whereby, for writing composite signals into the random access digital memory, a plurality of azimuth locations and range locations for each azimuth location are sequentially addressed to store any composite signals at a range scan segment associated with the respective azimuth scan, and, for reading composite signals from the random access digital memory, a plurality of memory range locations and azimuth locations are sequentially addressed to read any composite signals from an azimuth scan segment associated with the respective range scan.
Claim 6
Dependent Claim
75 words
In a display system according to claim 4, wherein the read/write address means comprises for the write addresses a range counter and an azimuth counter coupled to a divide-by-four circuit, said range counter and azimuth counter operative to generate a write address word sequence, and said divide-by-four circuit operative to determine the portion of the address memory word used to store the data being transferred from the buffer memory to the random access digital memory.
Claim 7
Dependent Claim
84 words
In a display system according to claim 4, wherein the read/write address means comprises for the read address an azimuth address counter coupled to a divide-by-four circuit for generating a group of addresses indicating the azimuth scan segment being read, and a range address counter coupled to a divide-by-two circuit for generating a group of addresses indicating the range scan segment being read, said read/write address counters operative to indicate the address in the random access digital memory where the composite signals are stored.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-07-29 | 1978-01-28 | 1978-07-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-07-29 | 1982-01-28 | 1982-07-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-07-29 | 1986-01-28 | 1986-07-30 | $7700.00 | Window Closed / Lapsed |