US3761784A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semi-conductor strain gauge device with field effect transistor symmetrical pairs
Assignee: SESCOSEM SOC EUROP SEMICONDUCT
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Filing: 1972-06-13
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Granted: 1973-09-25
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Expires: 1992-06-13
Abstract
Abstract Strain gauge comprising two pairs of field effect transistors integrated into the same substrate, and occupying positions disposed in symmetrical pairs vis-a-vis a substrate point, the channels of two symmetrical transistors being parallel with one another.
Inventors
- 👤 C Jund
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-22 17:22
CPC Classifications
G; G01; G01L; G01L9/00; G01L9/0098; H; H10; H10D; H10D89/00; H10D89/10; H10D99/00; H10N; H10N39/00
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
124 words
A strain guage device for measurement of mechanical stresses comprising: on a large face of a monocrystalline semi-conductor substrate, four integrated field effect transistors, respectively located at the four corners of a rhombus, having two diagonals the two transistors located at the ends of one diagonal, having their channel parallel to the other diagonal, and vice-versa, each of said two transistors having a load constituted respectively by one of the two other transistors located at the ends of said other diagonal, and having respectively their source terminals and their drain terminals connected together, said source and drain terminal exhibiting a potential difference for said measurement when said mechanical stresses are applied in a direction contained in said large face of the monocrystalline semiconductor substrate.
Claim 2
Dependent Claim
124 words
A strain guage device for measurement of mechanical stresses comprising: on a large face of a monocrystalline semi-conductor substrate, four integrated field effect transistors, respectively located at the four corners of a rhombus, having two diagonals the two transistors located at the ends of one diagonal, having their channel parallel to the other diagonal, and vice-versa, each of said two transistors having a load constituted respectively by one of the two other transistors located at the ends of said other diagonal, and having respectively their source terminals and their drain terminals connected together, said source and drain terminal exhibiting a potential difference for said measurement when said mechanical stresses are applied in a direction contained in said large face of the monocrystalline semiconductor substrate.
Claim 3
Dependent Claim
24 words
A device as claimed in claim 1, wherein two transistors located at the ends of a diagonal, are derived from one another by translation.
Claim 4
Dependent Claim
30 words
A device as claimed in claim 1, wherein two transistors located at the ends of a diagonal are derived from one another by their symmetry in relation to a point.
Claim 5
Dependent Claim
98 words
A device as claimed in claim 1 wherein said two transistors have their source-drain current flowing parallel to the axis along which the mechanical stresses are applied, the gate and substrate of each of said four transistors being connected to their respective sources, the sources of said two transistors being, earthed, and their drains being connected on the one hand to the output terminal for said measurement, and on the other hand to the respective sources of said two other transistors the drains of these two other transistors being connected to one terminal of the d.c. supply source.
Claim 6
Dependent Claim
70 words
A device as claimed in claim 4, wherein the implanted zones in a semiconductor layer of a first conductivity type, belonging to said two other transistors, are insulated from the implanted zones of said two transistors, by means of a ring-shaped zone heavily doped to produce a conductivity type opposite to the first mentioned conductivity type, said ring being at the potential of the drains of said two other transistors.
Claim 7
Dependent Claim
53 words
A device as claimed in claim 5, wherein each implanted zone in the transistors, is surrounded by a ring heavily doped to produce the first conductivity type, connected to said implanted layer for said two other transistors and to the substrate for said two transistors, said ring being located inside said ring-shaped zone.
Claim 8
Dependent Claim
56 words
A device as claimed in claim 6, wherein an insulated cross-connection is produced between on the one hand a metallised area linking a transistor electrode to a circuit terminal, and on the other hand a heavity doped layer forming an electrode extension and belonging beneath the oxide layer which is used to carry the metallised area.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-09-24 | 1977-03-26 | 1977-09-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-09-24 | 1981-03-26 | 1981-09-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-09-24 | 1985-03-26 | 1985-09-25 | $7700.00 | Window Closed / Lapsed |