US3750143A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Charge parceling integrator
Assignee: AT&T Inc
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Filing: 1972-07-18
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Granted: 1973-07-31
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Expires: 1992-07-18
Abstract
Abstract A charge parceling integrator for use in delta modulation encoders and decoders has its output taken from a first, or integrating, capacitor. At the start of each cycle, the voltage across this capacitor is reduced by connecting it in parallel with a second, or decrementing, capacitor which was previously discharged. When a digital 1 is the input to the decoder or the output of the encoder, a pulse is generated and applied through a third capacitor to the parallel combination of the first and second capacitors, thereby increasing the voltage across them. The ratio of the capacitor values is chosen so that the increase in voltage across the integrating capacitor when a digital 1 occurs is twice the decrease at the beginning of each cycle.
Inventors
- 👤 T Osborne
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-22 23:47
CPC Classifications
H; H04; H04B; H04B14/00; H04B14/02; H04B14/06; H04B14/062
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
135 words
A charge parceling integrator for decoding a delta modulation digital signal, comprising: a source of timing pulses for controlling the operation of said integrator; a first capacitor having the digital signal applied to its first side; means for unilaterally clamping the voltage at the second side of said first capacitor to a reference level; a second capacitor having its first side connected to ground; means for unilaterally coupling charge from the second side of said first capacitor to the second side of said second capacitor; a third capacitor connected between the output of said integrator and ground; a switching means for connecting the second side of said second capacitor to the output of said integrator in response to the timing pulses; and means for periodically discharging said second capacitor in response to the timing pulses.
Claim 2
Dependent Claim
135 words
A charge parceling integrator for decoding a delta modulation digital signal, comprising: a source of timing pulses for controlling the operation of said integrator; a first capacitor having the digital signal applied to its first side; means for unilaterally clamping the voltage at the second side of said first capacitor to a reference level; a second capacitor having its first side connected to ground; means for unilaterally coupling charge from the second side of said first capacitor to the second side of said second capacitor; a third capacitor connected between the output of said integrator and ground; a switching means for connecting the second side of said second capacitor to the output of said integrator in response to the timing pulses; and means for periodically discharging said second capacitor in response to the timing pulses.
Claim 3
Dependent Claim
36 words
A charge parceling integrator as claimed in claim 1 wherein said means for unilaterally clamping is a diode having its cathode connected to the second side of said first capacitor and its anode connected to ground.
Claim 4
Dependent Claim
43 words
A charge parceling integrator as claimed in claim 1 wherein said means for unilaterally coupling charge is a diode having its anode connected to the second side of said first capacitor and its cathode connected to the second side of said second capacitor.
Claim 5
Dependent Claim
44 words
A charge parceling integrator as claimed in claim 1 wherein said switching means is a field-effect transistor having its drain-source path connected between the second side of said second capacitor and the integrator output, and its gate connected to said source of timing pulses.
Claim 6
Dependent Claim
38 words
A charge parceling integrator as claimed in claim 1 wherein said means for periodically discharging is a field-effect transistor having its drain-source path connected across said second capacitor and its gate connected to said source of timing pulses.
Claim 7
Dependent Claim
195 words
A delta modulation encoder for converting an input analog voltage signal into digital pulses representing said analog voltage, comprising: a source of timing pulses for controlling the operation of said encoder; a two-input pulse generating means for generating a pulse synchronized with the timing pulses whenever the votlage at its first input is greater than the voltage at its second input; a first integrating capacitor having its first side connected to ground; A first switching means for connecting the input analog voltage to the first input of said pulse generating means and the second side of said first integrating capacitor to the second input of said pulse generating means in response to the timing pulses; a decrementing capacitor connected between the second input of said pulse generating means and ground; means for discharging said decrementing capacitor in response to the timing pulses; a feedback capacitor having its first side connected to the output of said pulse generating means; means for unilaterally clamping the voltage at the second side of said feedback capacitor; and means for unilaterally coupling charge from the second side of said feedback capacitor to the second input of said pulse generating means.
Claim 8
Dependent Claim
195 words
A delta modulation encoder for converting an input analog voltage signal into digital pulses representing said analog voltage, comprising: a source of timing pulses for controlling the operation of said encoder; a two-input pulse generating means for generating a pulse synchronized with the timing pulses whenever the votlage at its first input is greater than the voltage at its second input; a first integrating capacitor having its first side connected to ground; A first switching means for connecting the input analog voltage to the first input of said pulse generating means and the second side of said first integrating capacitor to the second input of said pulse generating means in response to the timing pulses; a decrementing capacitor connected between the second input of said pulse generating means and ground; means for discharging said decrementing capacitor in response to the timing pulses; a feedback capacitor having its first side connected to the output of said pulse generating means; means for unilaterally clamping the voltage at the second side of said feedback capacitor; and means for unilaterally coupling charge from the second side of said feedback capacitor to the second input of said pulse generating means.
Claim 9
Dependent Claim
138 words
A delta modulation encoder as claimed in claim 6 further including: a plurality of input analog signals; a plurality of separate iNtegrating capacitors, each associated with a separate input analog signal and each having its first side connected to ground; a plurality of separate switching means for sequentially connecting each input analog signal to the first input of said pulse generating means and the second side of the integrating capacitor, associated with each input analog signal, to the second input of said pulse generating means, said plurality of switching means operating in response to the timing pulses; and means for discharging any voltage at the first input of said pulse generating means in response to the timing pulses, thereby allowing the delta modulation encoder to function as a time-division multiplex encoder for a plurality of input analog signals.
References Cited (Backward Citations)
US2832070A
Cited
US3235862A
Cited
US3218630A
Cited
US3462759A
Cited
US3626408A
Cited
US3631468A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-07-30 | 1977-01-29 | 1977-07-31 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-07-30 | 1981-01-29 | 1981-07-31 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-07-30 | 1985-01-29 | 1985-07-31 | $7700.00 | Window Closed / Lapsed |