Methods of manufacturing a semiconductor device

Claim 2

A method as claimed in claim 1 wherein the thickness of the layer is at the most 0.1 micron.

Claim 3

A method as claimed in claim 3 wherein the thickness of the layer is at least 0.05 micron.

Claim 4

A method as claimed in claim 1 wherein said layer is provided on another layer on the semiconductor body surface, and the composition and thickness of the two layers are such that the majority of the ions bombarding the layer are absorbed without entering the semiconductor body, while atoms of the element from the layer penetrate the other layer and enter the semiconductor body.

Claim 5

A method as claimed in claim 1 wherein the ions are of an inert gas and are obtained from a gas discharge.

Claim 6

A method as claimed in claim 6 wherein the inert gas is argon or krypton and the ions have energies in the range of 10 keV to 100 keV.

Claim 7

A method as claimed in claim 1 wherein the layer is a metal layer electrode which forms a Schottky-type junction with the semiconductor body surface, and the atoms from the metal layer entering the said surface portion form at the surface an intimate rectifying contact between the metal layer electrode and the semiconductor body.

Claim 8

A method as claimed in claim 1 wherein the element is an impurity element characteristic of one conductivity type of the semiconductor body material, and atoms of the impurity element of the one conductivity type enter a portion of the semiconductor body of the one conductivity type.

Claim 9

A method as claimed in claim 9 wherein the semiconductor device is a semiconductor photocathode, and the implanted atoms of the impurity element increase the impurity concentration of the one conductivity type of a shallow surface region of the semiconductor body portion of the one conductivity type to permit enhancement of photo-emission therefrom.

Claim 10

A method as claimed in claim 1 wherein atoms of the impurity element of the one conductivity type enter a portion of the semiconductor body of the oppOsite conductivity type.

Claim 11

A method as claimed in claim 11 wherein the semiconductor device is a device for detecting and/or measuring radiation, the layer is provided over the whole of one major surface of the semiconductor body portion of the opposite conductivity type and bombarded with the ions to cause atoms of the impurity element to enter the whole of the one major surface and to form in the semiconductor body a shallow surface-adjacent region of the one conductivity type which forms with the adjacent semiconductor body portion of the opposite conductivity type a radiation-sensitive p-n junction.

Claim 12

A method as claimed in claim 1 wherein a masking layer pattern is provided selectively at the semiconductor body surface, and the said layer is provided on the masking layer pattern and on at least one unmasked portion of the semiconductor body surface, the composition and thickness of the masking layer pattern being such that, when the ions are directed at the whole of the said semiconductor body surface, atoms from the said layer entering the masking layer pattern do not enter the semiconductor body surface so that implantation is selective in the semiconductor body surface.

Claim 13

A method as claimed in claim 9 wherein another layer comprising an impurity element characteristic of the opposite conductivity type is provided on the semiconductor body surface and the two layers are bombarded simultaneously with ions which by energy transfer cause atoms of the two impurity elements to enter the semiconductor body surface to change in a desirable manner electrical characteristics associated with surface portions of the semiconductor body.

Claim 14

A method as claimed in claim 14 wherein the layer comprising the impurity element characteristic of the one conductivity type is provided on the said other layer on a portion of the semiconductor body of the opposite conductivity type.

Claim 15

A method as claimed in claim 15 wherein the semiconductor device comprises a bipolar transistor having an emitter region of the said opposite conductivity type and a base region of the one conductivity type, in which, during the ion bombardment, atoms of the impurity element characteristic of the one conductivity type enter the semiconductor body from one layer to form a region of the one conductivity type associated with the base region of the transistor, and heavier atoms of the impurity element characteristic of the opposite conductivity type enter the semiconductor body to a shallower level from the other layer to form a region of the opposite conductivity type associated with the emitter of the transistor.

Claim 16

A method as claimed in claim 15 wherein the two layers are provided over the whole of the said semiconductor body surface and scanned by a modulated energy beam of the ions, the energy modulation being such that atoms of the two impurity elements are selectively implanted in the semiconductor body surface to form semiconductor regions of desired configuration.

Claim 17

A method as claimed in claim 2 wherein, following the ion bombardment step, at least part of the metal layer is retained on the semiconductor to serve as an electrical contact for the underlying semiconductor portion.