US3597548A
Expired / Lapsed
US
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Time division multiplex switching system
Assignee: Automatic Telephone and Electric Co Ltd
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Filing: 1969-03-18
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Granted: 1971-08-03
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Expires: 1989-03-18
Abstract
Abstract In a pulse code modulation time division multiplex telephone system, the receive junction highways, each comprising 24 channels, are organized in groups of 8 with respect to a receive superhighway. Each receive junction highway handles speech and channel condition information in serial form for 12 originatinggo and 12 terminating-return channels which are interleaved. Eight shift registers are located between the 8 junction highways and a receive superhighway and the channels are processed so that the information for each is presented to the superhighway in parallel form in appropriate time slots. Thus a 96-bit frame embraces all the originating-go channels of a superhighway. Cord circuits having 96 32-bit storage locations are provided intermediate several receive and transmit superhighways to which all cord circuits have access over input and output cross-point arrays. Each storage location of a cord circuit provides storage for speech and signalling information for the control of the input and output cross-points to provide displacement compensation for the two junction channels used for the two directions of transmission. The exchange is organized on a superframe basis, eight frames constituting a superframe. Access to registers is obtained directly from the cord circuits and each of the latter is provided with scanning logic arranged to connect itself over input cross-points to successive superhighways in successive superframe periods.
Inventors
- 👤 James Walter Drinnan
- 👤 John Richard Francis
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-22 19:25
CPC Classifications
H; H04; H04Q; H04Q11/00; H04Q11/04; H04Q11/0407
Claims Analysis
Total Claims: 38
Claim 1
Independent Claim
608 words
A telephone switching system comprising in combination a plurality of four-wire junctions, a plurality of incoming time division multiplex transmission paths on two wires of each of said junctions, each of said transmission paths having y channels per frame, y being even, using x bits per channel for pulse code modulation, said x bits including a number of speech bits and one signalling bit, said incoming transmission paths being formed into equal groups of x transmission paths, a plurality of x bit parallel receive superhighways one for each group of transmission paths each receive superhighway carrying x.y channels, each of said transmission paths consisting of y/2 originating channels and y/2 terminating channels interleaved such that on oddnumbered transmission paths, odd-numbered channels are originating channels and even-numbered channels are terminating channels and on even-numbered transmission paths, even-numbered channels are originating channels and odd-numbered channels are terminating channels whereby each of said receive superhighways consists of x.y/2 originating channels interleaved with x.y/2 terminating channels, a plurality of outgoing time division multiplex transmission paths on the other two of said four wires of each of said junctions, each of said transmission paths having y channels per frame, y being even, using x bits per channel for pulse code modulation, said outgoing transmission paths being formed into equal groups of x transmission paths, a plurality of x bit parallel transmit superhighways one for each group of transmission paths each transmit superhighway carrying x.y channels, each of said outgoing transmission paths consisting of y/2 originating channels and y/2 terminating channels interleaved in the same manner as said incoming transmission paths, a first switching matrix, inlets and outlets to said first switching matrix, means connecting said receive superHighways to said inlets, a plurality of cord circuits for connection to said outlets, a second switching matrix, inlets and outlets to said second switching matrix, means connecting said inlets to said cord circuits and means connecting said outlets to said transmit superhighways, a storage device in each of said cord circuits having x.y/2 storage locations, means for processing storage locations in cyclic time slots in synchronism with the appearance of originating channels on said superhighways, time slot generators for processing storage locations randomly in synchronism with the appearance of terminating channels on said superhighways, each of said storage locations having 1. a first section for storing x bits of p.c.m. information received from a superhighway when a call is in progress using that location, 2. a second section for storing a code indicative of the crosspoints of one of said first and second switching matrices to be operated in a cyclic time slot, 3. a third section for storing a code indicative of the crosspoints of one of said first and second switching matrices to be operated in a random time slot, 4. a fourth section for storing a code indicative of the address of a storage location to be processed in the following random time slot, and 5. a fifth section for storing a code indicative of the stage reached in the processing of a call using that location, a scanning logic arrangement in each cord circuit, means responsive in each cyclic time slot when the code in said fifth section of the store location of a cord circuit being processed indicates that said location is not being used on a call for controlling said scanning logic arrangement to open a crosspoint in said first switching matrix to connect a particular one of said receive superhighways to said cord circuit to enable interrogation of the state of the signalling bit of the pulse code modulation on the transmission path currently associated with said receive superhighway.
Claim 2
Dependent Claim
608 words
A telephone switching system comprising in combination a plurality of four-wire junctions, a plurality of incoming time division multiplex transmission paths on two wires of each of said junctions, each of said transmission paths having y channels per frame, y being even, using x bits per channel for pulse code modulation, said x bits including a number of speech bits and one signalling bit, said incoming transmission paths being formed into equal groups of x transmission paths, a plurality of x bit parallel receive superhighways one for each group of transmission paths each receive superhighway carrying x.y channels, each of said transmission paths consisting of y/2 originating channels and y/2 terminating channels interleaved such that on oddnumbered transmission paths, odd-numbered channels are originating channels and even-numbered channels are terminating channels and on even-numbered transmission paths, even-numbered channels are originating channels and odd-numbered channels are terminating channels whereby each of said receive superhighways consists of x.y/2 originating channels interleaved with x.y/2 terminating channels, a plurality of outgoing time division multiplex transmission paths on the other two of said four wires of each of said junctions, each of said transmission paths having y channels per frame, y being even, using x bits per channel for pulse code modulation, said outgoing transmission paths being formed into equal groups of x transmission paths, a plurality of x bit parallel transmit superhighways one for each group of transmission paths each transmit superhighway carrying x.y channels, each of said outgoing transmission paths consisting of y/2 originating channels and y/2 terminating channels interleaved in the same manner as said incoming transmission paths, a first switching matrix, inlets and outlets to said first switching matrix, means connecting said receive superHighways to said inlets, a plurality of cord circuits for connection to said outlets, a second switching matrix, inlets and outlets to said second switching matrix, means connecting said inlets to said cord circuits and means connecting said outlets to said transmit superhighways, a storage device in each of said cord circuits having x.y/2 storage locations, means for processing storage locations in cyclic time slots in synchronism with the appearance of originating channels on said superhighways, time slot generators for processing storage locations randomly in synchronism with the appearance of terminating channels on said superhighways, each of said storage locations having 1. a first section for storing x bits of p.c.m. information received from a superhighway when a call is in progress using that location, 2. a second section for storing a code indicative of the crosspoints of one of said first and second switching matrices to be operated in a cyclic time slot, 3. a third section for storing a code indicative of the crosspoints of one of said first and second switching matrices to be operated in a random time slot, 4. a fourth section for storing a code indicative of the address of a storage location to be processed in the following random time slot, and 5. a fifth section for storing a code indicative of the stage reached in the processing of a call using that location, a scanning logic arrangement in each cord circuit, means responsive in each cyclic time slot when the code in said fifth section of the store location of a cord circuit being processed indicates that said location is not being used on a call for controlling said scanning logic arrangement to open a crosspoint in said first switching matrix to connect a particular one of said receive superhighways to said cord circuit to enable interrogation of the state of the signalling bit of the pulse code modulation on the transmission path currently associated with said receive superhighway.
Claim 3
Dependent Claim
28 words
a second section for storing a code indicative of the cross-points of one of said first and second switching matrices to be operated in a cyclic time slot,
Claim 4
Dependent Claim
28 words
a second section for storing a code indicative of the cross-points of one of said first and second switching matrices to be operated in a cyclic time slot,
Claim 5
Dependent Claim
60 words
A telephone switching system as claimed in claim 1 including a counter circuit in each of said scanning logic arrangements, said counter circuit having a maximum state of count equal to the number of receive superhighways provided in the exchange and being used to define said particular receive superhighways and means for advancing said counter one step every x frames.
Claim 6
Dependent Claim
28 words
a second section for storing a code indicative of the cross-points of one of said first and second switching matrices to be operated in a cyclic time slot,
Claim 7
Dependent Claim
28 words
a second section for storing a code indicative of the cross-points of one of said first and second switching matrices to be operated in a cyclic time slot,
Claim 8
Dependent Claim
28 words
a second section for storing a code indicative of the cross-points of one of said first and second switching matrices to be operated in a cyclic time slot,
Claim 9
Dependent Claim
28 words
a second section for storing a code indicative of the cross-points of one of said first and second switching matrices to be operated in a cyclic time slot,
Claim 10
Dependent Claim
32 words
A telephone switching system as claimed in claim 2 and including means in said counter circuits for selecting at any one time, on a mutually exclusive basis, one of said receive superhighways.
Claim 11
Dependent Claim
28 words
a third section for storing a code indicative of the cross-points of one of said first and second switching matrices to be operated in a random time slot,
Claim 12
Dependent Claim
28 words
a third section for storing a code indicative of the cross-points of one of said first and second switching matrices to be operated in a random time slot,
Claim 13
Dependent Claim
28 words
a third section for storing a code indicative of the cross-points of one of said first and second switching matrices to be operated in a random time slot,
Claim 14
Dependent Claim
28 words
a third section for storing a code indicative of the cross-points of one of said first and second switching matrices to be operated in a random time slot,
Claim 15
Dependent Claim
28 words
a third section for storing a code indicative of the cross-points of one of said first and second switching matrices to be operated in a random time slot,
Claim 16
Dependent Claim
28 words
a third section for storing a code indicative of the cross-points of one of said first and second switching matrices to be operated in a random time slot,
Claim 17
Dependent Claim
25 words
a fourth section for storing a code indicative of the address of a storage location to be processed in the following random time slot, and
Claim 18
Dependent Claim
25 words
a fourth section for storing a code indicative of the address of a storage location to be processed in the following random time slot, and
Claim 19
Dependent Claim
25 words
a fourth section for storing a code indicative of the address of a storage location to be processed in the following random time slot, and
Claim 20
Dependent Claim
25 words
a fourth section for storing a code indicative of the address of a storage location to be processed in the following random time slot, and
Claim 21
Dependent Claim
382 words
A telephone switching system comprising in combination a plurality of four-wire junctions, a plurality of incoming time division multiplex transmission paths on two wires of each of said junctions, each of said transmission paths having y channels per frame, y being even, using x bits per channel for pulse code modulation, said x bits including a number of speech bits and one signalling bit, said incoming transmission paths being formed into equal groups of x transmission paths, a plurality of x bit parallel receive superhighways one for each group of transmission paths each receive superhighway carrying x.y channels, each of said transmission paths consisting of y/2 originating channels and y/2 terminating channels interleaved such that on odd-numbered transmission paths, odd-numbered channels are originating channels and even-numbered channels are terminating channels and on even-numbered transmission paths, even-numbered channels are originating channels and odd-numbered channels are terminating channels whereby each of said receive superhighways consists of x.y/2 originating channels interleaved with x.y/2 terminating channels, a plurality of outgoing time division multiplex transmission paths on the other two of said four wires of eaCh of said junctions, each of said transmission paths having y channels per frame, y being even, using x bits per channel for pulse code modulation, said outgoing transmission paths being formed into equal groups of x transmission paths, a plurality of x bit parallel transmit superhighways one for each group of transmission paths each transmit superhighway carrying x.y channels, each of said outgoing transmission paths consisting of y/2 originating channels and y/2 terminating channels interleaved in the same manner as said incoming transmission paths, a first switching matrix, inlets and outlets to said first switching matrix, means connecting said receive superhighways to said inlets, a plurality of cord circuits for connection to said outlets, a second switching matrix, inlets and outlets to said second switching matrix, means connecting said inlets to said cord circuits and means connecting said outlets to said transmit superhighways, a storage device in each of said cord circuits having x.y/2 storage locations, means for processing storage locations in cyclic time slots in synchronism with the appearance of originating channels on said superhighways, time slot generators for processing storage locations randomly in synchronism with the appearance of terminating channels on said superhighways, each of said storage locations having
Claim 22
Dependent Claim
382 words
A telephone switching system comprising in combination a plurality of four-wire junctions, a plurality of incoming time division multiplex transmission paths on two wires of each of said junctions, each of said transmission paths having y channels per frame, y being even, using x bits per channel for pulse code modulation, said x bits including a number of speech bits and one signalling bit, said incoming transmission paths being formed into equal groups of x transmission paths, a plurality of x bit parallel receive superhighways one for each group of transmission paths each receive superhighway carrying x.y channels, each of said transmission paths consisting of y/2 originating channels and y/2 terminating channels interleaved such that on odd-numbered transmission paths, odd-numbered channels are originating channels and even-numbered channels are terminating channels and on even-numbered transmission paths, even-numbered channels are originating channels and odd-numbered channels are terminating channels whereby each of said receive superhighways consists of x.y/2 originating channels interleaved with x.y/2 terminating channels, a plurality of outgoing time division multiplex transmission paths on the other two of said four wires of eaCh of said junctions, each of said transmission paths having y channels per frame, y being even, using x bits per channel for pulse code modulation, said outgoing transmission paths being formed into equal groups of x transmission paths, a plurality of x bit parallel transmit superhighways one for each group of transmission paths each transmit superhighway carrying x.y channels, each of said outgoing transmission paths consisting of y/2 originating channels and y/2 terminating channels interleaved in the same manner as said incoming transmission paths, a first switching matrix, inlets and outlets to said first switching matrix, means connecting said receive superhighways to said inlets, a plurality of cord circuits for connection to said outlets, a second switching matrix, inlets and outlets to said second switching matrix, means connecting said inlets to said cord circuits and means connecting said outlets to said transmit superhighways, a storage device in each of said cord circuits having x.y/2 storage locations, means for processing storage locations in cyclic time slots in synchronism with the appearance of originating channels on said superhighways, time slot generators for processing storage locations randomly in synchronism with the appearance of terminating channels on said superhighways, each of said storage locations having
Claim 23
Dependent Claim
25 words
a fourth section for storing a code indicative of the address of a storage location to be processed in the following random time slot, and
Claim 24
Dependent Claim
25 words
a fourth section for storing a code indicative of the address of a storage location to be processed in the following random time slot, and
Claim 25
Dependent Claim
91 words
a fifth section for storing a code indicative of the stage reached in the processing of a call using that location, an interrogation logic arrangement associated with each cord circuit, an interrogation register included in said interrogation logic arrangement and responsive to the reception of the address of the superhighway serving the outgoing transmission paths corresponding to a dialled code for controlling said second switching device to operate a cross-point relative to a particular transmit superhighway to permit interrogation of the states of the transmission paths on said particular transmit superhighway.
Claim 26
Dependent Claim
91 words
a fifth section for storing a code indicative of the stage reached in the processing of a call using that location, an interrogation logic arrangement associated with each cord circuit, an interrogation register included in said interrogation logic arrangement and responsive to the reception of the address of the superhighway serving the outgoing transmission paths corresponding to a dialled code for controlling said second switching device to operate a cross-point relative to a particular transmit superhighway to permit interrogation of the states of the transmission paths on said particular transmit superhighway.
Claim 27
Dependent Claim
62 words
A telephone switching system as claimed in claim 4 and including a plurality of additional storage elements in each storage location of a cord circuit to form a plurality of shift registers, each register having a bit capacity equal to half the number of storage locations and means for cycling two of said registers in one frame for each additional storage element.
Claim 28
Dependent Claim
72 words
a fifth section for storing a code indicative of the stage reached in the processing of a call using that location, and at least one additional storage element in each storage location of a cord circuit, at least some of said additional storage elements forming successive stages in a shift register for dialled digits, the least significant bit of which is formed by the additional storage element in the first storage location.
Claim 29
Dependent Claim
72 words
a fifth section for storing a code indicative of the stage reached in the processing of a call using that location, and at least one additional storage element in each storage location of a cord circuit, at least some of said additional storage elements forming successive stages in a shift register for dialled digits, the least significant bit of which is formed by the additional storage element in the first storage location.
Claim 30
Dependent Claim
117 words
a fifth section for storing a code indicative of the stage reached in the processing of a call using that location, a scanning logic arrangement in each cord circuit, means responsive in each cyclic time slot when the code in said fifth section of the store location of a cord circuit being processed indicates that said location is not being used on a call for controlling said scanning logic arrangement to open a cross-point in said first switching matrix to connect a particular one of said receive superhighways to said cord circuit to enable interrogation of the state of the signalling bit of the pulse code modulation on the transmission path currently associated with said receive superhighway.
Claim 31
Dependent Claim
117 words
a fifth section for storing a code indicative of the stage reached in the processing of a call using that location, a scanning logic arrangement in each cord circuit, means responsive in each cyclic time slot when the code in said fifth section of the store location of a cord circuit being processed indicates that said location is not being used on a call for controlling said scanning logic arrangement to open a cross-point in said first switching matrix to connect a particular one of said receive superhighways to said cord circuit to enable interrogation of the state of the signalling bit of the pulse code modulation on the transmission path currently associated with said receive superhighway.
Claim 32
Dependent Claim
48 words
A telephone switching system as claimed in claim 5 and including a register selection arrangement for generating the address of a free register and means for writing said address into the first section of the currently processed cord circuit storage location when a calling condition is first detected.
Claim 33
Dependent Claim
382 words
A telephone switching system comprising in combination a plurality of four-wire junctions, a plurality of incoming time division multiplex transmission paths on two wires of each of said junctions, each of said transmission paths having y channels per frame, y being even, using x bits per channel for pulse code modulation, said x bits including a number of speech bits and one signalling bit, said incoming transmission paths being formed into equal groups of x transmission paths, a plurality of x bit parallel receive superhighways one for each group of transmission paths each receive superhighway carrying x.y channels, each of said transmission paths consisting of y/2 originating channels and y/2 terminating channels interleaveD such that on odd-numbered transmission paths, odd-numbered channels are originating channels and even-numbered channels are terminating channels and on even-numbered transmission paths, even-numbered channels are originating channels and odd-numbered channels are terminating channels whereby each of said receive superhighways consists of x.y/2 originating channels interleaved with x.y/2 terminating channels, a plurality of outgoing time division multiplex transmission paths on the other two of said four wires of each of said junctions, each of said transmission paths having y channels per frame, y being even, using x bits per channel for pulse code modulation, said outgoing transmission paths being formed into equal groups of x transmission paths, a plurality of x bit parallel transmit superhighways one for each group of transmission paths each transmit superhighway carrying x.y channels, each of said outgoing transmission paths consisting of y/2 originating channels and y/2 terminating channels interleaved in the same manner as said incoming transmission paths, a first switching matrix, inlets and outlets to said first switching matrix, means connecting said receive superhighways to said inlets, a plurality of cord circuits for connection to said outlets, a second switching matrix, inlets and outlets to said second switching matrix, means connecting said inlets to said cord circuits and means connecting said outlets to said transmit superhighways, a storage device in each of said cord circuits having x.y/2 storage locations, means for processing storage locations in cyclic time slots in synchronism with the appearance of originating channels on said superhighways, time slot generators for processing storage locations randomly in synchronism with the appearance of terminating channels on said superhighways, each of said storage locations having
Claim 34
Dependent Claim
382 words
A telephone switching system comprising in combination a plurality of four-wire junctions, a plurality of incoming time division multiplex transmission paths on two wires of each of said junctions, each of said transmission paths having y channels per frame, y being even, using x bits per channel for pulse code modulation, said x bits including a number of speech bits and one signalling bit, said incoming transmission paths being formed into equal groups of x transmission paths, a plurality of x bit parallel receive superhighways one for each group of transmission paths each receive superhighway carrying x.y channels, each of said transmission paths consisting of y/2 originating channels and y/2 terminating channels interleaveD such that on odd-numbered transmission paths, odd-numbered channels are originating channels and even-numbered channels are terminating channels and on even-numbered transmission paths, even-numbered channels are originating channels and odd-numbered channels are terminating channels whereby each of said receive superhighways consists of x.y/2 originating channels interleaved with x.y/2 terminating channels, a plurality of outgoing time division multiplex transmission paths on the other two of said four wires of each of said junctions, each of said transmission paths having y channels per frame, y being even, using x bits per channel for pulse code modulation, said outgoing transmission paths being formed into equal groups of x transmission paths, a plurality of x bit parallel transmit superhighways one for each group of transmission paths each transmit superhighway carrying x.y channels, each of said outgoing transmission paths consisting of y/2 originating channels and y/2 terminating channels interleaved in the same manner as said incoming transmission paths, a first switching matrix, inlets and outlets to said first switching matrix, means connecting said receive superhighways to said inlets, a plurality of cord circuits for connection to said outlets, a second switching matrix, inlets and outlets to said second switching matrix, means connecting said inlets to said cord circuits and means connecting said outlets to said transmit superhighways, a storage device in each of said cord circuits having x.y/2 storage locations, means for processing storage locations in cyclic time slots in synchronism with the appearance of originating channels on said superhighways, time slot generators for processing storage locations randomly in synchronism with the appearance of terminating channels on said superhighways, each of said storage locations having
Claim 35
Dependent Claim
70 words
A telephone switching system as claimed in claim 7 and including a control circuit in said interrogation logic arrangement activated, when the cord circuit storage location processed in the cyclic time slot corresponding to that of a channel requiring a call to be set up is free, as indicated by the state of the code in the fifth section, to cause said interrogation register to control said transmit superhighway cross-points.
Claim 36
Dependent Claim
31 words
A telephone switching system as claimed in claim 8 and including means in said control circuit for producing a discrete output signal if said cord circuit storage location is not free.
Claim 37
Dependent Claim
72 words
A telephone switching system as claimed in claim 9 and including a gating circuit in said interrogation logic arraNgement, said gating circuit being activated, when said associated cord circuit is selected to handle a call, to control the writing of the cross-point addresses relevant to said call into said third and fourth sections of the currently processed storage location in the cyclic time slot applicable to the originating channel of the call.
Claim 38
Dependent Claim
97 words
A telephone switching system as claimed in claim 10 and including means responsive at the cyclic time slot prior to the random time slot applicable to the channel to be used as the terminating channel for the call, for activating said gating circuit to retain the selection of the storage location addressed in said cyclic time slot throughout the following random time slot to allow the address of the storage location processed in the cyclic time slot corresponding to the originating channel for the call to be written into the fourth section of said retained storage location.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-08-02 | 1975-02-01 | 1975-08-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-08-02 | 1979-02-01 | 1979-08-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-08-02 | 1983-02-01 | 1983-08-03 | $7700.00 | Window Closed / Lapsed |