Data communication controller having dual scanning

Claim 1

A data communication system having dual scanners for selectively providing signals to a plurality of subchannels, at least one of said subchannels having a source of priority signals, and system comprising: first and second counters each having a plurality of flip-flops, said first counter having a greater number of flip-flops than said second counter, said flip-flops of said first and said second counters each having an input terminal and an output terminal; an oscillator, said oscillator being coupled to said input terminal of a first flip-flop in said first counter and to said input terminal of a first flip-flop in said second counter; a source of enabling signals, said source supplying enabling signals, said enabling signals causing a counter to operate when said source is connected to a first flip-flop in said first counter; switching means having an input lead and first and second output leads, said input lead of said switching means being connected to said source of enabling signals, said first output lead of said switching means being coupled to said input lead of said first flip-flop in said first counter, said second output lead of said switching means being coupled to said input terminal of said first flip-flop in said second counter; a plurality of switches, each of said switches being connected to a corresponding one of said output terminals of said flipflops in said second counter; a scanner-select flip-flop having an input terminal and first and second output terminals; a decoding matrix having a plurality of input leads and a plurality of output leads, each of said output leads of said matrix being coupled to a corresponding one of said subchannels; means for connecting said source of priority signals to said input terminal of said scanner-select flip-flop; and a Plurality of AND-gates each having first and second input leads and an output lead, said gates being divided into first and second groups, said first input lead of each of said ANDgates in said first group being connected to said first output terminal of said scanner-select flip-flop, said second input lead of said AND-gates in said first group being connected to an output terminal of a corresponding one of said flip-flops in said first counter, said first input lead of each of said ANDgates in said second group being connected to said second output terminal of said scanner-select flip-flop, said second input lead of said AND-gates in said second group being connected to a corresponding one of said switches, said output leads of each of said AND-gates in said first and said second groups being coupled to a corresponding one of said input leads of said decoding matrix.