Patent US3673397A successfully refreshed from Google Patents.
US3673397A
Expired / Lapsed
US
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Circuit tester
Assignee: Link Flight Simulation Corp
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Filing: 1970-10-02
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Granted: 1972-06-27
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Expires: 1990-10-02
Abstract
Abstract The disclosed embodiment of the present invention is an automatic circuit tester for providing stimuli to, sensing responses from, and sensing the condition of individual input and output terminals of the circuit under test. Identical circuit means are provided for each input and output terminal of the circuit under test, and each includes a storage device for storing a prediction of the expected response of the stimulus to be applied to a corresponding input terminal of the circuit under test. Each of the circuit means also includes a logic circuit for comparing the prediction of the expected response and producing a ''''fail'''' signal upon the occurrence of non-coincidence therebetween. Each of the circuit means are automatically provided with data corresponding to the prediction of the expected response or the stimulus to be applied to the circuit under test from a programmable record such as a data processing card. In addition, each circuit means is capable of responding to or providing stimulus in the proper form to the corresponding terminal in accordance with the type of logic employed in the circuit under test. This is accomplished by employing translators for converting input and output signals to appropriate signals which are compatible with the type of logic employed in the circuit means and in the circuit under test. Each circuit means is programmed by programable data processing cards and the information programmed on such cards is strobed by appropriate timing and encoding circuits into a corresponding one of the circuit means.
Inventors
- 👤 Bruce M Schaefer
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-22 20:50
CPC Classifications
G; G01; G01R; G01R31/00; G01R31/28; G01R31/317; G01R31/3181; G01R31/319; G01R31/3193
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
168 words
A testing circuit having a terminal disposed for connection to a unit under test wherein a stimulus is supplied to the unit under test in response to one state of the testing circuit and receives a response from the unit under test in response to another state of the testing circuit, comprising: a. means for storing a signal in the form of one of two digital levels; b. programmable storage means having two states; c. a gate having one input connected to said signal storing means and another input connected to said storage means and an output disposed for connection to said terminal, whereby the output provides the stimulus to the unit under test; and d. comparing means having one input connected to said terminal and the output of said gate, and another input connected to said signal storing means and providing an output in response to non-coincidence between said signal and the response from the unit under test, whereby such output is an indication of a failure.
Claim 2
Dependent Claim
168 words
A testing circuit having a terminal disposed for connection to a unit under test wherein a stimulus is supplied to the unit under test in response to one state of the testing circuit and receives a response from the unit under test in response to another state of the testing circuit, comprising: a. means for storing a signal in the form of one of two digital levels; b. programmable storage means having two states; c. a gate having one input connected to said signal storing means and another input connected to said storage means and an output disposed for connection to said terminal, whereby the output provides the stimulus to the unit under test; and d. comparing means having one input connected to said terminal and the output of said gate, and another input connected to said signal storing means and providing an output in response to non-coincidence between said signal and the response from the unit under test, whereby such output is an indication of a failure.
Claim 3
Dependent Claim
37 words
A system as defined in claim 1, further including means for converting a signal compatible with one logic type to a signal compatible with another logic type, said converting means being disposed for connection to said terminal.
Claim 4
Dependent Claim
6 words
programmable storage means having two states;
Claim 5
Dependent Claim
6 words
programmable storage means having two states;
Claim 6
Dependent Claim
43 words
a gate having one input connected to said signal storing means and another input connected to said storage means and an output disposed for connection to said terminal, whereby the output provides the stimulus to the input terminal of the digital circuit; and
Claim 7
Dependent Claim
43 words
a gate having one input connected to said signal storing means and another input connected to said storage means and an output disposed for connection to said terminal, whereby the output provides the stimulus to the input terminal of the digital circuit; and
Claim 8
Dependent Claim
24 words
A system as defined in claim 2, wherein said converting means includes a controllable conduction element having a conductive path in two directions therethrough.
Claim 9
Dependent Claim
49 words
A system as defined in claim 2, wherein said converting means includes a pair of controllable conduction elements connected in parallel with one another and each having a conductive path in two directions therethrough, said system further comprising programmable means for selectively enabling one of said controllable conduction elements.
Claim 10
Dependent Claim
89 words
comparing means having one input connected to one of said terminals and the output of said gate, and another input connected to said signal storing means and providing an output in response to non-coincidence between said signal and the response from the output terminal of the digital circuit, whereby such output is an indication of a failure; b. means for reading a programmed record to provide data corresponding to the information contained thereon; and c. means responsive to said reading means for selectively energizing each of said circuit means.
Claim 11
Dependent Claim
89 words
comparing means having one input connected to one of said terminals and the output of said gate, and another input connected to said signal storing means and providing an output in response to non-coincidence between said signal and the response from the output terminal of the digital circuit, whereby such output is an indication of a failure; b. means for reading a programmed record to provide data corresponding to the information contained thereon; and c. means responsive to said reading means for selectively energizing each of said circuit means.
Claim 12
Independent Claim
68 words
A system for testing a digital circuit having a plurality of input and output terminals wherein the system provides stimuli to the input terminals and receives responses from the output terminals of the digital circuit in the form of two digital levels, comprising: a. a plurality of circuit means each disposed for connection to a respective terminal of such a digital circuit, each of said circuit means including,
Claim 13
Independent Claim
68 words
A system for testing a digital circuit having a plurality of input and output terminals wherein the system provides stimuli to the input terminals and receives responses from the output terminals of the digital circuit in the form of two digital levels, comprising: a. a plurality of circuit means each disposed for connection to a respective terminal of such a digital circuit, each of said circuit means including,
References Cited (Backward Citations)
US3370232A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-06-27 | 1975-12-27 | 1976-06-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-06-27 | 1979-12-27 | 1980-06-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-06-27 | 1983-12-27 | 1984-06-27 | $7700.00 | Window Closed / Lapsed |