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US3667054A
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Pulse train decoder with pulse width rejection
Assignee: United States Department of the Navy
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Filing: 1971-02-10
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Granted: 1972-05-30
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Expires: 1991-02-10
Abstract
Abstract Logic circuitry to decode a series of pulses in an IFF system. Decoding is accomplished by sensing the presence of multiple pulses in a distinct time relationship with each other and excluding those pulse trains in which the individual pulses do not have the correct time relationship. The width of the individual pulses is also used as a decoding criteria and if a particular pulse does not have the correct width by being either too narrow or too wide, it is not considered for time position decoding.
Inventors
- 👤 George P Nelson
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-22 22:47
CPC Classifications
G; G01; G01R; G01R29/00; G01R29/02; G01R29/027; G01R29/0273; G01S; G01S13/00; G01S13/74; G01S13/76; G01S13/78
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
153 words
A decoder including the logic circuitry for detecting and rejecting narrow and wide pulses while time position decoding is being accomplished comprising: a shift register having a plurality of stages for shifting input data; a first logic circuit coupled to said shift register for detecting a pulse whose width is wider than a first specified value; a second logic circuit coupled to said shift register for detecting a pulse whose width is more narrow than a second specified value; means coupled to said logic circuits and said shift register for eliminating a pulse whose width is wider than the first specified value and more narrow than said second specified value; a first coincidence means coupled to said shift register for providing an output pulse when pulses of said input data are of a particular spacing so long as said pulses of said input data each fall within said first and second specified value.
Claim 2
Dependent Claim
153 words
A decoder including the logic circuitry for detecting and rejecting narrow and wide pulses while time position decoding is being accomplished comprising: a shift register having a plurality of stages for shifting input data; a first logic circuit coupled to said shift register for detecting a pulse whose width is wider than a first specified value; a second logic circuit coupled to said shift register for detecting a pulse whose width is more narrow than a second specified value; means coupled to said logic circuits and said shift register for eliminating a pulse whose width is wider than the first specified value and more narrow than said second specified value; a first coincidence means coupled to said shift register for providing an output pulse when pulses of said input data are of a particular spacing so long as said pulses of said input data each fall within said first and second specified value.
Claim 3
Dependent Claim
114 words
A decoder as recited in claim 1 wherein said narrow pulse detection comprises: a first OR gate having one of its inputs from a first stage of said shift register and a second input coupled to the data input to said shift register; a second OR gate having an input from a third stage of said shift register; second coincidence means coupled to said first and second OR gates and to a second stage of said shift register; whereby said second coincidence means produces an output pulse only when there is data located in said second stage of said shift register, said output pulse resetting said second and third stages of said shift register.
Claim 4
Dependent Claim
46 words
A decoder as recited in claim 4 wherein said second logic circuit comprises: a third coincidence means coupled to at least seven stages of said shift register; said third coincidence means output signal indicating a pulse wider than said second specified value within said shift register.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-05-30 | 1975-11-29 | 1976-05-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-05-30 | 1979-11-29 | 1980-05-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-05-30 | 1983-11-29 | 1984-05-30 | $7700.00 | Window Closed / Lapsed |