Patent US3665421A successfully refreshed from Google Patents.
← Back to Patent Explorer
US3665421A Expired / Lapsed US ⏱️ 0.0 years remaining

Information processing system implementing program structures common to higher level program languages

Assignee: Unisys Corp
•
Filing: 1969-11-28
•
Granted: 1972-05-23
•
Expires: 1989-11-28
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract This disclosure relates to an information processing system adapted to implement functions common to many higher level programming languages which functions require information structures to be variable in length and size. Each processor in this multiprocessing system contains various structure buffers to manage different process or program structures that are nested to provide a hierarchy of processes and subprocesses. The structure buffers include resource stack buffers that reference resources available to a currently allocated process including a description of that process environment that in turn references control information for currently executed routines. Buffers are also provided to the various process name stacks that describe parameters and operands required and also for the value stacks which hold such operands. The structure buffers are addressed through an associative memory to allow for the searching of the buffers for often used entries.

Inventors

  • 👤 Frederick V Rehhausser
  • 👤 Elmer Dean Earnest
  • 👤 Robert V Bock
  • 👤 Frederick H Gerbstadt
  • 👤 James J Monek

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-22 22:59
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/46; G06F9/48; G06F9/4806; G06F9/4843; G06F9/44; G06F9/448; G06F9/4482; G06F9/4484

Claims Analysis

Total Claims: 13
Claim 1
Independent Claim 109 words
In an information processing system having a storage system for storing stacks of information including descriptors, and a processor to execute a string of program operators, said processor comprising: a first plurality of buffer registers to receive a plurality of descriptors required by said program string; a sEcond plurality of buffer registers to receive, from said storage system, procedure descriptors referencing procedure sets of descriptors to be employed by the process currently being executed; and means responsive to the execution of program operators to search said second plurality of buffer registers for a procedure descriptor for the set of descriptors containing the descriptor called for by said program operator.
Claim 2
Dependent Claim 109 words
In an information processing system having a storage system for storing stacks of information including descriptors, and a processor to execute a string of program operators, said processor comprising: a first plurality of buffer registers to receive a plurality of descriptors required by said program string; a sEcond plurality of buffer registers to receive, from said storage system, procedure descriptors referencing procedure sets of descriptors to be employed by the process currently being executed; and means responsive to the execution of program operators to search said second plurality of buffer registers for a procedure descriptor for the set of descriptors containing the descriptor called for by said program operator.
Claim 3
Dependent Claim 35 words
A processor according to claim 1 including: a third plurality of buffer registers to receive descriptors to subsets of said descriptors which subset descriptors form base references for addressing individual descriptors in said storage system.
Claim 4
Dependent Claim 36 words
A processor according to claim 1 including: a plurality of associative memory registers coupled to each of said first plurality of buffer registers to hold addressing indices for associatively addressing said first plurality of buffer registers.
Claim 5
Dependent Claim 38 words
A processor according to claim 1 including: a fourth plurality of buffer registers to receive from said storage system descriptors which address procedures which may exist concurrently with but are to be executed separately from the current procedure.
Claim 6
Dependent Claim 58 words
A processor according to claim 1 including: means responsive to the execution of a program operator calling for a descriptor to scan said first plurality of buffer registers for the presence of said called descriptor and to fetch said called descriptor from said storage system should said called descriptor not reside in said first plurality of buffer registers.
Claim 7
Dependent Claim 172 words
In an information processing system having a storage system for storing stacks of information, said stacks including value stacks of operands, name stacks of operand descriptors to address said operands, and stacks of descriptors referencing procedure sets of such name stacks of operand descriptors; a processor to execute a string of program operators, said processor comprising: a first plurality of buffer registers to receive, from a name stack in said storage system, a plurality of operand descriptors to address operands required by said program string; a second plurality of buffer registers to receive, from a value stack in said storage system, the operands referenced by said operand descriptors; a third plurality of buffer registers to receive from said storage system said descriptors referencing sets of such operand descriptors; and means responsive to the decoding of a program operator calling for a value operand to search said third plurality of buffer registers for a descriptor addressing the set of operand descriptors containing the operand descriptor of the operand called for by said operator.
Claim 8
Dependent Claim 172 words
In an information processing system having a storage system for storing stacks of information, said stacks including value stacks of operands, name stacks of operand descriptors to address said operands, and stacks of descriptors referencing procedure sets of such name stacks of operand descriptors; a processor to execute a string of program operators, said processor comprising: a first plurality of buffer registers to receive, from a name stack in said storage system, a plurality of operand descriptors to address operands required by said program string; a second plurality of buffer registers to receive, from a value stack in said storage system, the operands referenced by said operand descriptors; a third plurality of buffer registers to receive from said storage system said descriptors referencing sets of such operand descriptors; and means responsive to the decoding of a program operator calling for a value operand to search said third plurality of buffer registers for a descriptor addressing the set of operand descriptors containing the operand descriptor of the operand called for by said operator.
Claim 9
Dependent Claim 37 words
A processor according to claim 6 including: a fourth plurality of buffer registers to receive descriptors to subsets of said operand descriptors which subset descriptors form base references for addressing individual operand descriptors in said name stack.
Claim 10
Dependent Claim 36 words
A processor according to claim 6 including: a plurality of associative memory registers coupled to each of said first plurality of buffer registers to hold addressing indices for associatively addressing said first plurality of buffer registers.
Claim 11
Dependent Claim 38 words
A processor according to claim 6 including: a fifth plurality of buffer registers to receive from said storage system descriptors which address procedures which may exist concurrently with but are to be executed separately from the current procedure.
Claim 12
Dependent Claim 193 words
In an information processing system having a processor to execute a string of program operators and a storage system for storing stacks of information, said stacks including value stacks of operands, name stacks of operand descriptors to address said operands, and stacks of descriptors referencing procedure sets of such name stacks of operand descriptors, said processor including first, second and third pluralities of buffer registers to receive from said storage system, pluralities of operands, corresponding opErand descriptors and procedure set descriptors; the method comprising: scanning said second plurality of buffer registers for the presence of an operand descriptor referencing an operand called for by the decoding of a program operator, fetching said operand from said storage system to said first plurality of buffer registers when the corresponding operand descriptor is not present in said second plurality of buffer registers, scanning said third plurality of buffer registers for the presence of a procedure set descriptor referencing the set of operand descriptors that includes the operand descriptor corresponding to the called operand; and halting the execution of said program operator when said procedure set descriptor is not present in said third set of buffer registers.
Claim 13
Dependent Claim 193 words
In an information processing system having a processor to execute a string of program operators and a storage system for storing stacks of information, said stacks including value stacks of operands, name stacks of operand descriptors to address said operands, and stacks of descriptors referencing procedure sets of such name stacks of operand descriptors, said processor including first, second and third pluralities of buffer registers to receive from said storage system, pluralities of operands, corresponding opErand descriptors and procedure set descriptors; the method comprising: scanning said second plurality of buffer registers for the presence of an operand descriptor referencing an operand called for by the decoding of a program operator, fetching said operand from said storage system to said first plurality of buffer registers when the corresponding operand descriptor is not present in said second plurality of buffer registers, scanning said third plurality of buffer registers for the presence of a procedure set descriptor referencing the set of operand descriptors that includes the operand descriptor corresponding to the called operand; and halting the execution of said program operator when said procedure set descriptor is not present in said third set of buffer registers.

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1975-05-23 1975-11-22 1976-05-23 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1979-05-23 1979-11-22 1980-05-23 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1983-05-23 1983-11-22 1984-05-23 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag