Patent US1731280A successfully refreshed from Google Patents.
Patent US3641330A successfully refreshed from Google Patents.
US3641330A
Expired / Lapsed
US
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Microprogrammed digital computer providing various operations by word circulation
Assignee: Omron Corp
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Filing: 1969-05-07
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Granted: 1972-02-08
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Expires: 1989-05-07
Abstract
Abstract A plurality of shift registers are interconnected serially by a plurality of gates. To perform computer micro-operations, the words contained within the registers are circulated therethrough in steps, each step being divided into a plurality of separate time periods. The particular operation that is being performed is controlled by microprogrammed matrices which provide appropriate control signals during each time period to determine which gates are to be opened therein. Specific configurations are described for the operations of word addition, word transfer between registers, word transfer back to a register, shifting out of a register the greatest or the least significant digit of a word, and so forth. In addition, a configuration is shown including a single register and a decoding matrix for serially transferring the word in one register to a numeric display device, as is a configuration allowing retention of other words in the remaining registers during such a transfer. Finally, various embodiments of the microprogrammed matrices are shown.
Inventors
- 👤 Isao Hatano
- 👤 Kenichi Kitajima
- 👤 Katsumi Iwatani
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 10:26
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/22; G06F9/223; G06F15/00; G06F15/02
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
193 words
An electronic digital computer comprising: a. first, second and third registers, each having an input and an output, b. means connecting the output of said first register to the input of said second register, c. a first gate for coupling the output of said first register to its input, d. a second gate for coupling the output of said second register to the input of said third register, e. a fourth register having a capacity equal to the number of bits corresponding to one decimal digit, f. a third gate for coupling the output of said fourth register to the input of said third register, and means connecting the output of said second register to the input of said fourth register, g. an adder having two inputs and an output, h. fourth and fifth gates for coupling, respectively, the outputs of said second and third registers to the inputs of said adder, i. a sixth gate for coupling the output of said adder to the input of said first register, and j. a microprogrammed control unit for supplying appropriate control signals to said gates to effect the operations of circulation, shift and transfer.
Claim 2
Dependent Claim
193 words
An electronic digital computer comprising: a. first, second and third registers, each having an input and an output, b. means connecting the output of said first register to the input of said second register, c. a first gate for coupling the output of said first register to its input, d. a second gate for coupling the output of said second register to the input of said third register, e. a fourth register having a capacity equal to the number of bits corresponding to one decimal digit, f. a third gate for coupling the output of said fourth register to the input of said third register, and means connecting the output of said second register to the input of said fourth register, g. an adder having two inputs and an output, h. fourth and fifth gates for coupling, respectively, the outputs of said second and third registers to the inputs of said adder, i. a sixth gate for coupling the output of said adder to the input of said first register, and j. a microprogrammed control unit for supplying appropriate control signals to said gates to effect the operations of circulation, shift and transfer.
Claim 3
Dependent Claim
144 words
A computer as recited in claim 1, wherein said third register comprises fifth and sixth registers, said fifth register having a capacity equal to the number of bits corresponding to the digits of a decimal number, minus one digit, and said sixth register having a capacity equal to the number of bits corresponding to one decimal digit, means connecting the input of said fifth register as the input of said third register, means connecting the output of said sixth register as the output of said third register, means connecting the output of said fifth register to the input of said sixth register, and seventh and eighth gates for coupling the outputs of said fifth and sixth registers, respectively, to the input of said first register, wherein said gates are controlled by the control signals from said microprogrammed control unit to effect a shift-right operation.
Claim 4
Dependent Claim
141 words
An electronic digital computer comprising: a. first, second and third registers, each having an input and an output, b. means connecting the output of the said first register to the input of said second register, c. a first gate for coupling the output of said second register to the input of said first register, d. means connecting the output of said second register to the input of said third register, e. an adder having two inputs and an output, f. second and third gates for coupling the outputs of said second and third registers, respectively, to the inputs of said adder, g. a fourth gate for coupling the output of said adder to the input of said first register, and h. a microprogrammed control unit foR supplying appropriate control signals to said gates to effect the operations of circulation and transfer.
Claim 5
Dependent Claim
141 words
An electronic digital computer comprising: a. first, second and third registers, each having an input and an output, b. means connecting the output of the said first register to the input of said second register, c. a first gate for coupling the output of said second register to the input of said first register, d. means connecting the output of said second register to the input of said third register, e. an adder having two inputs and an output, f. second and third gates for coupling the outputs of said second and third registers, respectively, to the inputs of said adder, g. a fourth gate for coupling the output of said adder to the input of said first register, and h. a microprogrammed control unit foR supplying appropriate control signals to said gates to effect the operations of circulation and transfer.
Claim 6
Dependent Claim
143 words
A computer as recited in claim 3, wherein said third register comprises fifth and sixth registers, said fifth register having a capacity equal to the number of bits corresponding to the digits of a decimal number, minus one digit, and said sixth register having a capacity equal to the number of bits corresponding to one decimal digit, means connecting the input of said fifth register as the input of said third register, means connecting the output of said sixth register as the output of said third register, means connecting the output of said fifth register to the input of said sixth register, and fifth and sixth gates for coupling the outputs of said fifth and sixth registers, respectively, to the input of said first register, said gates being controlled by the control signals from said microprogrammed control unit to effect a shift-right operation.
Claim 7
Dependent Claim
156 words
An electronic digital computer comprising: a. first, second and third registers, each having an input and an output, b. a plurality of gates being arranged to interconnect said first, second and third registers in various series paths by the application of suitable control signals thereto, c. a microprogrammed control unit for supplying said control signals to said gates to effect the operations of circulation, shift and transfer, said microprogrammed control unit including a first matrix providing a plurality of step outputs, each step output denoting an interval time corresponding to one operation step, means providing a plurality of timing signals, each timing signal denoting a separate increment of time within each operation step, a second matrix for dividing each of said step outputs into a plurality of step signals, one step signal being provided for each timing interval, and a third matrix receiving said timing signals and said step signals and producing therefrom said control signals.
Claim 8
Dependent Claim
156 words
An electronic digital computer comprising: a. first, second and third registers, each having an input and an output, b. a plurality of gates being arranged to interconnect said first, second and third registers in various series paths by the application of suitable control signals thereto, c. a microprogrammed control unit for supplying said control signals to said gates to effect the operations of circulation, shift and transfer, said microprogrammed control unit including a first matrix providing a plurality of step outputs, each step output denoting an interval time corresponding to one operation step, means providing a plurality of timing signals, each timing signal denoting a separate increment of time within each operation step, a second matrix for dividing each of said step outputs into a plurality of step signals, one step signal being provided for each timing interval, and a third matrix receiving said timing signals and said step signals and producing therefrom said control signals.
Claim 9
Dependent Claim
31 words
A computer as recited in claim 5, further comprising a source of electricity, and circuit means operable in response to said timing signals to connect said step signals to said source.
Claim 10
Dependent Claim
56 words
A computer as recited in claim 6 further including a gating means connected between said circuit means and said source of electricity, means producing a calculation signal, means coupling said calculation signal to said gating means, so whereby said source is selectively connected to said circuit means to control the operation being performed by said computer.
Claim 11
Independent Claim
184 words
A method for use in an electronic digital computer comprising a plurality of registers, each having an input and an output, a plurality of gates arranged for interconnecting said plurality of registers in various series paths, one of said plurality of registers being divided into first and second portions, said first portion thereof having a capacity equal to the number of bits corresponding to the digits of the decimal number, minus one digit, and said second portion having a capacity equal to the number of bits corresponding to one decimal digit, an indicating means, means connecting the output of said second portion to said indicating means, said method being useful for displaying only a desired word in said indicating means and comprising the steps of: a. controlling said plurality of gates to replace, by circulation in successive time intervals, the contents of each of said plurality of registers with said word, and b. thereafter circulating said word in a series path of said plurality of registers so that only that word is supplied to said indicating means through said second portion of said register.
Claim 12
Independent Claim
184 words
A method for use in an electronic digital computer comprising a plurality of registers, each having an input and an output, a plurality of gates arranged for interconnecting said plurality of registers in various series paths, one of said plurality of registers being divided into first and second portions, said first portion thereof having a capacity equal to the number of bits corresponding to the digits of the decimal number, minus one digit, and said second portion having a capacity equal to the number of bits corresponding to one decimal digit, an indicating means, means connecting the output of said second portion to said indicating means, said method being useful for displaying only a desired word in said indicating means and comprising the steps of: a. controlling said plurality of gates to replace, by circulation in successive time intervals, the contents of each of said plurality of registers with said word, and b. thereafter circulating said word in a series path of said plurality of registers so that only that word is supplied to said indicating means through said second portion of said register.
Claim 13
Independent Claim
168 words
A method for use with a digital computer including a plurality of registers, each having an input and output, a first plurality of gates arranged for interconnecting said registers in a series path, an indicating means, a fourth register having an input and output, and a capacity equal to the number of bits corresponding to one decimal digit, and means connecting its output to the indicating means, and a second plurality of gates for coupling the outputs of said registers individually to the input of said fourth register, said method being useful for displaying only a desired word in said indicating means, and comprising the steps of: a. controlling said first plurality of gates so that said word is circulated through said registers in said series path in successive timing intervals, and b. sequentially opening said second plurality of gates so that only that one of said plurality of registers which contains said word at a given timing interval is connected to the input of said fourth register.
Claim 14
Independent Claim
168 words
A method for use with a digital computer including a plurality of registers, each having an input and output, a first plurality of gates arranged for interconnecting said registers in a series path, an indicating means, a fourth register having an input and output, and a capacity equal to the number of bits corresponding to one decimal digit, and means connecting its output to the indicating means, and a second plurality of gates for coupling the outputs of said registers individually to the input of said fourth register, said method being useful for displaying only a desired word in said indicating means, and comprising the steps of: a. controlling said first plurality of gates so that said word is circulated through said registers in said series path in successive timing intervals, and b. sequentially opening said second plurality of gates so that only that one of said plurality of registers which contains said word at a given timing interval is connected to the input of said fourth register.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-02-07 | 1975-08-09 | 1976-02-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-02-07 | 1979-08-09 | 1980-02-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-02-07 | 1983-08-09 | 1984-02-08 | $7700.00 | Window Closed / Lapsed |