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US3573794A Expired / Lapsed US ⏱️ 0.0 years remaining

Analog/digital processing techniques

Assignee: NAI Technologies Inc
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Filing: 1967-05-11
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Granted: 1971-04-06
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Expires: 1987-05-11
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Abstract

Abstract Systems for processing analog and digital data are disclosed herein and include techniques for converting analog data to digital data (a to d) and vice versa (d to a), as well as errordetection processing for optimizing system response. Several a/d systems are illustrated, one employing an AC analog input to a comparator which is coupled to a null detector system employing a voltage-to-frequency converter for supplying null responsive signals to a digitizer; another of the systems is of comparable configuration but employs a multiplier-integrator combination in the null detector system without utilizing voltage-to-frequency conversion. A third system of generally similar configuration utilizes both the multiplier-integrator and the voltage/frequency conversion circuits. Provisions are also made for threshold control and other response shaping functions.

Inventors

  • 👤 Malcolm D Widenor

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 08:15
CPC Classifications
G; G05; G05D; G05D3/00; G05D3/12; G05D3/20; G05D3/121; G05D3/124; H; H03; H03M; H03M1/00; H03M1/12; H03M1/48; H03M1/485

Claims Analysis

Total Claims: 19
Claim 1
Independent Claim 220 words
In apparatus for processing dynamically changing analog data to derive digital output data representing a function of said analog data, said apparatus comprising: A. a closed loop system having; 1. comparator-detector means, said comparator-detector means comprising, a. means for receiving said input analog data, b. means for receiving feedback data, c. error processing means operatively connected and responsive to said input and feedback receiving means for deriving an AC error signal of amplitude modulated carrier form, d. said error processing means including means for suppressing the effects of carrier harmonics on said error signal, 2. means connected to be controlled by said error processing means for deriving a control signal, 3. means responsive to said control signal for generating digital data, 4. digital-analog converter means responsive to said generated digital data, and 5. means coupling said converter means to said feedback receiving means of said comparator-detector means for reducing said error signal to a null condition; and B. means responsive to said digital generating means for supplying said digital output data, the improvement comprising; C. harmonic suppression means for improving the dynamic performance of said system without a concomitant degradation in accuracy, said suppression means comprising means connected in the circuit of said error processing means for multiplying and integrating said AC error signal to suppress harmonics of said carrier.
Claim 2
Dependent Claim 220 words
In apparatus for processing dynamically changing analog data to derive digital output data representing a function of said analog data, said apparatus comprising: A. a closed loop system having; 1. comparator-detector means, said comparator-detector means comprising, a. means for receiving said input analog data, b. means for receiving feedback data, c. error processing means operatively connected and responsive to said input and feedback receiving means for deriving an AC error signal of amplitude modulated carrier form, d. said error processing means including means for suppressing the effects of carrier harmonics on said error signal, 2. means connected to be controlled by said error processing means for deriving a control signal, 3. means responsive to said control signal for generating digital data, 4. digital-analog converter means responsive to said generated digital data, and 5. means coupling said converter means to said feedback receiving means of said comparator-detector means for reducing said error signal to a null condition; and B. means responsive to said digital generating means for supplying said digital output data, the improvement comprising; C. harmonic suppression means for improving the dynamic performance of said system without a concomitant degradation in accuracy, said suppression means comprising means connected in the circuit of said error processing means for multiplying and integrating said AC error signal to suppress harmonics of said carrier.
Claim 3
Dependent Claim 15 words
means connected to be controlled by said error processing means for deriving a control signal,
Claim 4
Dependent Claim 15 words
means connected to be controlled by said error processing means for deriving a control signal,
Claim 5
Dependent Claim 28 words
Apparatus according to claim 1 including threshold gating means connected in said loop to be responsive to said error signal for opening said closed loop during null conditions.
Claim 6
Dependent Claim 32 words
Apparatus according to claim 1 in which said analog data comprises AC electRical data, and said means for receiving said input analog data comprises means for receiving input AC electrical analog data.
Claim 7
Dependent Claim 10 words
means responsive to said control signal for generating digital data,
Claim 8
Dependent Claim 10 words
means responsive to said control signal for generating digital data,
Claim 9
Dependent Claim 10 words
digital-analog converter means responsive to said generated digital data, and
Claim 10
Dependent Claim 10 words
digital-analog converter means responsive to said generated digital data, and
Claim 11
Dependent Claim 14 words
Apparatus according to claim 3 in which said AC electrical data comprises resolver signals.
Claim 12
Dependent Claim 28 words
Apparatus according to claim 3 including threshold gating means connected in said loop to be responsive to said error signal for opening said closed loop during null conditions.
Claim 13
Dependent Claim 87 words
means coupling said converter means to said feedback receiving means of said comparator-detector means for reducing said error signal to a null condition; and B. means responsive to said digital generating means for supplying said digital output data, the improvement comprising; C. harmonic suppression means for improving the dynamic performance of said system without a concomitant degradation in accuracy, said suppression means comprising means connected in the circuit of said error processing means for multiplying and integrating said AC error signal to suppress harmonics of said carrier.
Claim 14
Dependent Claim 87 words
means coupling said converter means to said feedback receiving means of said comparator-detector means for reducing said error signal to a null condition; and B. means responsive to said digital generating means for supplying said digital output data, the improvement comprising; C. harmonic suppression means for improving the dynamic performance of said system without a concomitant degradation in accuracy, said suppression means comprising means connected in the circuit of said error processing means for multiplying and integrating said AC error signal to suppress harmonics of said carrier.
Claim 15
Dependent Claim 14 words
Apparatus according to claim 5 in which said AC electrical data comprises resolver signals.
Claim 16
Dependent Claim 22 words
Apparatus according to claim 1 in which said analog data comprises mechanical input data, and said comparator-detector means includes mechanical-to-electrical transducing means.
Claim 17
Dependent Claim 14 words
Apparatus according to claim 7 in which said mechanical input data comprises shaft angle.
Claim 18
Dependent Claim 28 words
Apparatus according to claim 7 including threshold gating means connected in said loop to be responsive to said error signal for opening said closed loop during null conditions.
Claim 19
Dependent Claim 14 words
Apparatus according to claim 9 in which said mechanical input data comprises shaft angle.

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1974-04-05 1974-10-05 1975-04-06 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1978-04-05 1978-10-05 1979-04-06 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1982-04-05 1982-10-05 1983-04-06 $7700.00 Window Closed / Lapsed

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