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US3346874A Expired / Lapsed US ⏱️ 0.0 years remaining

Power control circuits

Assignee: General Electric Co
•
Filing: 1964-02-07
•
Granted: 1967-10-10
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Expires: 1984-02-07
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Abstract

No abstract record available.

Inventors

  • 👤 Howell Edward Keith

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-22 21:00
CPC Classifications
G; G05; G05F; G05F1/00; G05F1/10; G05F1/12; G05F1/40; G05F1/44; G05F1/45; G05F1/455; G05D; G05D23/00; G05D23/19; G05D23/1906; G05D23/20; G05D23/24; H; H03; H03K; H03K17/00; H03K17/51; H03K17/56; H03K17/72; H03K17/722; H03K17/723; H03K17/725; H05; H05B; H05B41/00; H05B41/14; H05B41/36; H05B41/38; H05B41/39; H05B41/392; H05B41/3921; H05B41/3924; H10; H10D; H10D18/00; H10D18/80; Y; Y10; Y10S; Y10S315/00; Y10S315/04

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 301 words
A CIRCUIT FOR CONNECTION TO A SOURCE OF ALTERNATING CURRENT COMPRISING IN COMBINATION, A BI-DIRECTIONAL CURRENT CONDUCTING SEMICONDUCTOR DEVICE, SAID DEVICE COMPRISING A BODY OF SEMICONDUCTOR MATERIAL INCLUDING FIVE LAYERS OF ONE AND THE OPPOSITE CONDUCTIVITY TYPES, LAYERS OF ONE CONDUCTIVITY TYPE BEING INTERLEAVED WITH LAYERS OF THE OPPOSITE CONDUCTIVITY TYPE FORMING A PLURALITY OF P-N JUNCTIONS THEREIN, A FIRST MAIN CURRENT CARRYING ELECTRODE IN LOW RESISTANCE OHMIC CONTACT WITH A SURFACE OF AN EXTERNAL LAYER OF SAID BODY AND AN EXPOSED SURFACE OF AN ADJACENT INTERMEDIATE LAYER, A SECOND MAIN CURRENT CARRYING ELECTRODE IN LOW RESISTANCE OHMIC CONTACT WITH A SURFACE OF OTHER EXTERNAL LAYER OF SAID BODY AND AN EXPOSED SURFACE OF THE ADJACENT INTERMEDIATE LAYER, A GATE REGION OF THE SAME CONDUCTIVITY AS SAID EXTERNAL LAYER OF SAID BODY ADJACENT SAID INTERMEDIATE LAYER CONTACTED BY SAID FIRST MAIN CURRENT CARRYING ELECTRODE, AND THIRD ELECTRODE MEANS IN OHMIC CONTACT WITH SAID GATE REGION AND WITH THE ADJACENT LAYER, NORMALLY EXHIBITING A HIGH IMPEDANCE BETWEN SAID TWO MAIN CURRENT CARRYING ELECTRODES THEREOF AND EXHIBITING A LOW IMPEDANCE THEREBETWEEN IN RESPONSE TO THE APPLICATION OF A SIGNAL HAVING AN AMPLITUDE GREATER THAN A PREDETERMINED MAGNITUDE TO SAID THIRD ELECTRODE THEREOF, MEANS FOR INTERCONNECTING A LOAD WITH THE TWO MAIN CURRENT CARRYING ELECTRODES OF SAID SEMICONDUCTOR AND A SOURCE OF ALTERNATING CURRENT, PHASE SHIFTING MEANS SUPPLIED BY SAID SOURCE OF ALTERNATING CURRENT, MEANS CONNECTING THE OUTPUT OF SAID PHASE SHIFTING MEANS BETWEEN THE THIRD ELECTRODE OF SAID SEMICONDUCTOR AND ONE OF SAID TWO MAIN CURRENT CARRYING ELECTRODES AND OPERATIVE TO FURNISH A LOW IMPEDANCE PATH THEREBETWEEN IN RESPONSE TO A SIGNAL PREDETERMINED PHASE SHIFTING MEANS HAVING AT LEAST SAID PREDETERMINED MAGNITUDE, AND ADDITIONAL MEANS SUPPLIED BY SAID SOURCE OF ALTERNATING CURRENT AND OPERATIVE TO MODIFY THE OUTPUT OF SAID PHASE SHIFTING MEANS.
Claim 2
Dependent Claim 301 words
A CIRCUIT FOR CONNECTION TO A SOURCE OF ALTERNATING CURRENT COMPRISING IN COMBINATION, A BI-DIRECTIONAL CURRENT CONDUCTING SEMICONDUCTOR DEVICE, SAID DEVICE COMPRISING A BODY OF SEMICONDUCTOR MATERIAL INCLUDING FIVE LAYERS OF ONE AND THE OPPOSITE CONDUCTIVITY TYPES, LAYERS OF ONE CONDUCTIVITY TYPE BEING INTERLEAVED WITH LAYERS OF THE OPPOSITE CONDUCTIVITY TYPE FORMING A PLURALITY OF P-N JUNCTIONS THEREIN, A FIRST MAIN CURRENT CARRYING ELECTRODE IN LOW RESISTANCE OHMIC CONTACT WITH A SURFACE OF AN EXTERNAL LAYER OF SAID BODY AND AN EXPOSED SURFACE OF AN ADJACENT INTERMEDIATE LAYER, A SECOND MAIN CURRENT CARRYING ELECTRODE IN LOW RESISTANCE OHMIC CONTACT WITH A SURFACE OF OTHER EXTERNAL LAYER OF SAID BODY AND AN EXPOSED SURFACE OF THE ADJACENT INTERMEDIATE LAYER, A GATE REGION OF THE SAME CONDUCTIVITY AS SAID EXTERNAL LAYER OF SAID BODY ADJACENT SAID INTERMEDIATE LAYER CONTACTED BY SAID FIRST MAIN CURRENT CARRYING ELECTRODE, AND THIRD ELECTRODE MEANS IN OHMIC CONTACT WITH SAID GATE REGION AND WITH THE ADJACENT LAYER, NORMALLY EXHIBITING A HIGH IMPEDANCE BETWEN SAID TWO MAIN CURRENT CARRYING ELECTRODES THEREOF AND EXHIBITING A LOW IMPEDANCE THEREBETWEEN IN RESPONSE TO THE APPLICATION OF A SIGNAL HAVING AN AMPLITUDE GREATER THAN A PREDETERMINED MAGNITUDE TO SAID THIRD ELECTRODE THEREOF, MEANS FOR INTERCONNECTING A LOAD WITH THE TWO MAIN CURRENT CARRYING ELECTRODES OF SAID SEMICONDUCTOR AND A SOURCE OF ALTERNATING CURRENT, PHASE SHIFTING MEANS SUPPLIED BY SAID SOURCE OF ALTERNATING CURRENT, MEANS CONNECTING THE OUTPUT OF SAID PHASE SHIFTING MEANS BETWEEN THE THIRD ELECTRODE OF SAID SEMICONDUCTOR AND ONE OF SAID TWO MAIN CURRENT CARRYING ELECTRODES AND OPERATIVE TO FURNISH A LOW IMPEDANCE PATH THEREBETWEEN IN RESPONSE TO A SIGNAL PREDETERMINED PHASE SHIFTING MEANS HAVING AT LEAST SAID PREDETERMINED MAGNITUDE, AND ADDITIONAL MEANS SUPPLIED BY SAID SOURCE OF ALTERNATING CURRENT AND OPERATIVE TO MODIFY THE OUTPUT OF SAID PHASE SHIFTING MEANS.

References Cited (Backward Citations)

FR1267417A Cited
US3196330A Cited
US3188490A Cited
US3249807A Cited
US3196329A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1970-10-09 1971-04-10 1971-10-10 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1974-10-09 1975-04-10 1975-10-10 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1978-10-09 1979-04-10 1979-10-10 $7700.00 Window Closed / Lapsed

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