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US3196329A Expired / Lapsed US ⏱️ 0.0 years remaining

Symmetrical switching diode

Assignee: Texas Instruments Inc
•
Filing: 1963-03-08
•
Granted: 1965-07-20
•
Expires: 1983-03-08
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Abstract

No abstract record available.

Inventors

  • 👤 Donald F Cook
  • 👤 David F Cosper

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 02:32
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/51; H03K17/56; H03K17/72; H03K17/722; H03K17/723; H02; H02M; H02M5/00; H02M5/02; H02M5/04; H02M5/22; H02M5/25; H02M5/257; H02M5/2573; H10; H10D; H10D8/00; H10D8/50; H10D99/00; Y; Y10; Y10S; Y10S315/00; Y10S315/03

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 165 words
A SYMMETRICAL THREE-LAYER AVALANCHE DIODE COMPRISING A THIN WAFER OF MONOCRYSTALLINE SILICON HAVING A P-TYPE CENTRAL REGION BETWEEN TWO DIFFUSED N-TYPE OUTER REGIONS, THE N-TYPE REGIONS BEING UNIFORMLY SPACED FROM ONE ANOTHER THROUGH THE P-TYPE REGION BY ABOUT 0.6 TO 1.0 MIL SO THAT THE APPARENT GAIN OF THE TRANSISTOR-LIKE DEVICE INHERENT IN THE GEOMETRY OF THE THREE LAYER STRUCTURE WILL BE RELATIVELY LOW, THE N-TYPE REGIONS BEING SUBSTANTIALLY EQUIVALENT TO ONE ANOTHER IN PHYSICAL DIMENSIONS AND IMPURITY CONCENTRATIONS, THE P-TYPE REGION HAVING AN IMPURITY CONCENTRATION WHICH IS UNIFORM IN A DIRECTION PERPENDICULAR TO THE PLANE OF THE WAFER, SAID IMPURITY CONCENTRATION OF THE P-TYPE REGION HAVING LESS THAN THAT OF SAID N-TYPE REGIONS, THE IMPURITY CONCENTRATION OF THE P-TYPE REGION RELATIVE TO THE IMPURITY CONCENTRATIONS OF THE N-TYPE REGIONS AND THE THICKNESS OF THE P-TYPE REGION PREVENTING PUNCH-THROUGH FROM OCCURRING AT A BIAS VOLTAGE LOWER THAN AVALANCHE BREAKDOWN, AND A PAIR OF METALLIC CONTACTS ADHERENT TO THE N-TYPE REGIONS FOR PROVIDING OHMIC CONNECTIONS THERETO.
Claim 2
Dependent Claim 165 words
A SYMMETRICAL THREE-LAYER AVALANCHE DIODE COMPRISING A THIN WAFER OF MONOCRYSTALLINE SILICON HAVING A P-TYPE CENTRAL REGION BETWEEN TWO DIFFUSED N-TYPE OUTER REGIONS, THE N-TYPE REGIONS BEING UNIFORMLY SPACED FROM ONE ANOTHER THROUGH THE P-TYPE REGION BY ABOUT 0.6 TO 1.0 MIL SO THAT THE APPARENT GAIN OF THE TRANSISTOR-LIKE DEVICE INHERENT IN THE GEOMETRY OF THE THREE LAYER STRUCTURE WILL BE RELATIVELY LOW, THE N-TYPE REGIONS BEING SUBSTANTIALLY EQUIVALENT TO ONE ANOTHER IN PHYSICAL DIMENSIONS AND IMPURITY CONCENTRATIONS, THE P-TYPE REGION HAVING AN IMPURITY CONCENTRATION WHICH IS UNIFORM IN A DIRECTION PERPENDICULAR TO THE PLANE OF THE WAFER, SAID IMPURITY CONCENTRATION OF THE P-TYPE REGION HAVING LESS THAN THAT OF SAID N-TYPE REGIONS, THE IMPURITY CONCENTRATION OF THE P-TYPE REGION RELATIVE TO THE IMPURITY CONCENTRATIONS OF THE N-TYPE REGIONS AND THE THICKNESS OF THE P-TYPE REGION PREVENTING PUNCH-THROUGH FROM OCCURRING AT A BIAS VOLTAGE LOWER THAN AVALANCHE BREAKDOWN, AND A PAIR OF METALLIC CONTACTS ADHERENT TO THE N-TYPE REGIONS FOR PROVIDING OHMIC CONNECTIONS THERETO.

References Cited (Backward Citations)

US1877140A Cited
US3067485A Cited
US3120633A Cited
US3121860A Cited
US3149395A Cited
US3146392A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1968-07-19 1969-01-18 1969-07-20 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1972-07-19 1973-01-18 1973-07-20 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1976-07-19 1977-01-18 1977-07-20 $7700.00 Window Closed / Lapsed

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