Fast access system to magnetic drum memories

Claim 1

IN AN ELECTRICAL DIGITAL COMPUTER INCLUDING A SOURCE OF ELECTRICAL SIGNALS REPRESENTING DATA ITEMS TO BE OPERATED UPON, A PRINCIPAL MAGNETIC DRUM MEMORY DIVIDED INTO A PLURALITY OF TRACKS AND A PLURALITY OF N SECTOR POSITIONS PER TRACK, ONE SECTOR POSITION FOR EACH DATA ITEM, WHEREBY SAID DATA ITEMS ARE IDENTIFIED BY SECTOR AND TRACK ADDRESSES, A SECTOR ADDRESS REGISTER, A TRACK ADDRESS REGISTER AND A DATA REGISTER ASSOCIATED WITH SAID PRINCIPAL MAGNETIC DRUM MEMORY, A FAST ACCESS DATA TRANSFER SYSTEM, SAID SYSTEM COMPRISING AN INTERMEDIATE FAST ACCESS MEMORY DIVIDED INTO A PLURALITY OF N STORAGE POSITIONS, ONE STORAGE POSITION FOR EACH DATA ITEM AND THE TRACK ADDRESS THEREOF, EACH OF SAID STORAGE POSITIONS OF THE INTERMEDIATE MEMORY CORRESPONDING TO A SECTOR POSITION OF A TRACK OF THE PRINCIPAL MEMORY REGARDLESS OF THE ADDRESS OF SAID TRACK, A FIRST FAST ACCESS TRANSFER MEANS FOR RANDOMLY TRANSFERRING DATA ITEMS AND THE TRACK ADDRESSES THEREOF FROM THE DATA SOURCE INTO THE STORAGE POSITIONS OF THE INTERMEDIATE MEMORY ACCORDING TO THE SECTOR ADDRESSES OF SID DATA ITEMS, SECOND FAST ACCESS TRANSFER MEANS CONTROLLED BY THE SECTOR ADDRESS REGISTER FOR RECURRENTLY TRANSFERRING THE DATA ITEMS AND THE TRACK ADDRESSES THEREOF RESPECTIVELY FROM THE STORAGE POSITIONS OF THE INTERMEDIATE MEMORY WHICH CORRESPOND TO SECTOR POSITIONS OF THE PRINCIPAL MEMORY, SUCCESSIVELY SPACED APART BY K SECTOR POSITIONS, K BEING AN INTEGER SMALLER THAN N AND PRIME WITH N, INTO SAID DATA REGISTER AND TRACK ADDRESS REGISTER, THIRD LOW ACCESS TRANSFER MEANS FOR TRANSFERRING FROM THE DATA REGISTER INTO THE PRINCIPAL MEMORY SAID DATA ITEMS ACCORDING TO THEIR TRACK ADDRESSES AND MEANS FOR INHIBITING SAID FIRST TRANSFER MEANS DURING THE OPERATION OF SAID SECOND TRANSFER MEANS.