Digital computer system

Claim 1

A DIGITAL COMPUTER SYSTEM INCLUDING: A COMMON MEMORY UNIT HAVING A PLURALITY OF MULTISECTOR INFORMATION CHANNELS THEREON FOR STORING BINARY INFORMATION REPRESENTATIVE OF INSTRUCTIONS AND OPERANDS, FURTHER HAVING AN ADDRESS CHANNEL THEREON CONTAINING INFORMATION IDENTIFYING THE SECTORS IN EACH CHANNEL, AND FURTHER HAVING A PLURALITY OF INSTRUCTION REGISTER CHANNELS THEREON; A PLURALITY OF GROUPS OF READ HEADS COUPLED TO SAID INFORMATION CHANNELS AT DIFFERENT POINTS OF ACCESS THERETO TO DERIVE SAID INSTRUCTIONS AND OPERANDS THEREFROM; A CORRESPONDING PLURALITY OF DIGITAL COMPUTER UNITS CONNECTED TO RESPECTIVE ONES OF SAID GROUPS OF READ HEADS; A FURTHER PLURALITY OF READ HEADS COUPLED TO SAID ADDRESS CHANNEL AT DIFFERENT POINTS OF ACCESS HAVING MUTUAL DISPLACEMENTS CORRESPONDING TO THE DISPLACEMENTS OF THE HEADS OF THE AFORESAID GROUPS AND CONNECTED TO RESPECTIVE ONES OF SAID COMPUTER UNITS; A PLURALITY OF WRITE HEADS COUPLED TO RESPECTIVE ONES OF SAID INSTRUCTION REGISTER CHANNELS AND CONNECTED TO RESPECTIVE ONES OF SAID COMPUTER UNITS, AND A PLURALITY OF READ HEADS COUPLED TO RESPECTIVE ONES OF SAID INSTRUCTION REGISTER CHANNELS AT SELECTED DISPLACEMENTS WITH RESPECT TO CORRESPONDING ONES OF SAID WRITE HEADS AND CONNECTED TO RESPECTIVE ONES OF SAID COMPUTER UNITS, SO THAT SAID COMPUTER UNITS DERIVE THE SAME INSTRUCTIONS FROM SAID MEMORY UNIT IN THE SAME PREDETERMINED SEQUENCE BUT AT SELECTED TIME DISPLACEMENTS AND CAUSE THE SAME TO CIRCULATE IN RESPECTIVE ONES OF SAID INSTRUCTION REGISTER CHANNELS AT SAID SELECTED TIME DISPLACEMENTS, AND SO THAT SAID COMPUTER UNITS ALL SELECT THE SAME OPERANDS FROM SAID MEMORY UNIT IN THE SAME SEQUENCE AT SAID SELECTED TIME DISPLACEMENT AND PERFORM THE SAME ARITHMETIC OPERATIONS THEREON.