Interrupt logic system for computers

Claim 1

IN A SYSTEM WHEREIN PERIPHERAL DATA STORAE EQUIPMENT IS EMPLOYED WITH A COMPUTER HAVING A MEMORY AND WHICH COMPUTER OPERATES IN RESPONSE TO COMMAND SIGNALS, SAID EQUIPMENT PROVIDING AN EQUIPMENT AVAILABLE SIGNAL WHEN ITS IS READY TO PROVIDE DATA TO BE STORED IN SAID COMPUTER MEMORY, THE IMPORVEMENT IN AN INTERRUPT OPERATION COMPRISING: MEANS RESPONSIVE TO SAID EQUIPMENT AVAILABLE SIGNAL FOR GENERATING AN INTERRUPT SIGNAL, MEANS FOR INHIBITING READ-OUT OPERATION OF THE COMPUTER MEMORY RESPONSIVE TO SAID INTERRUPT SIGNAL, MEANS FOR APPLYING SAID INTERRUPT SIGNAL TO SAID MEANS FOR INHIBITING, MEANS RESPONSIVE TO THE INHIBITION OF SAID MEMORY READ-OUT OPERATION FOR GENERATING AN INTERRUPT COMMAND, DATA MEANS RESPONSIVE TO SAID INTERRUPT COMMAND AND TO THE EQUIPMENT AVAILABLE SIGNAL FOR GENERATING A MEMORY ADDRESS SIGNAL, REGISTRY MEANS, MEANS FOR ENTERING SAID MEMORY ADDRESS SIGNAL INTO SAID REGISTRY MEANS, MEANS IN SAID COMPUTER RESPONSIVE TO SAID INTERRUPT COMMOND AND SAID MEMORY ADDRESS SIGNAL IN SAID REGISTER MEANS FOR STORING IN SAID COMPUTER MEMORY AT THE DESIGNATED ADDRESS DATA IN SAID COMPUTER REQUIRED TO BE USED AT THE TERMINATION OF SAID INTERRUPT OPERATION, AND MEANS RESPONSIVE TO SAID ADDRESS SIGNAL IN SAID REGISTER MEANS FOR PROVIDING A SIGNAL INDICATIVE OF THE AVAILABILITY OF SAID COMPUTER TO ACCEPT DATA FROM SAID PERIPHERAL EQUIPMENT.