High speed data conversion and handling

Claim 1

AN ANALOG-TO-DIGITAL CONVERTER COMPRISING IN COMBINATION, ANALOG SIGNAL INPUT TERMINALS, A MASTER TIMER FOR SUPPLYING A PLURALITY OF STEEP-FRONT VOLTAGES IN SUCCESSION IN A PLURALITY OF DIFFERENT CHANNELS, A PLURALITY OF PULSE FORMERS IN EACH OF SAID CHANNELS, A PLURALITY OF BISTABLE ELECTRONIC VALUE UNITS, ONE FOR EACH OF SAID CHANNELS, EACH SUCH UNIT HAVING AN OUTPUT TERMINAL AND TWO INPUT TERMINALS REFERRED TO AS THE ZERO AND ONE TERMINALS, RESPECTIVELY, CONNECTIONS BETWEEN THE PULSE FORMERS AND THE ONE TERMINALS IN EACH CHANNEL, A PLURALITY OF COINCIDENCE GATES EQUAL IN NUMBER TO THE NUMBER OF CHANNELS EACH HAVING AN OUTPUT TERMINAL CONNECTED TO THE ZERO TERMINAL OF THE PRECEDING CHANNEL, HAVING A FIRST INPUT TERMINAL CONNECTED TO THE CHANNEL PULSE SHAPER, AND HAVING A SECOND INPUT TERMINAL, ALL OF THE SAID SECOND INPUT TERMINALS BEING INTERCONNECTED, A TRIGGER UNIT WITH AN INPUT TERMINAL AND WITH AN OUTPUT TERMINAL CONNECTED TO SAID SECOND COINCIDENCE GATE TERMINALS, A STANDARD VOLTAGE GENERATOR HAVING A PLURALITY OF INPUT TERMINALS, EACH CONNECTED TO ONE OF SAID BISTABLE OUTPUT TERMINALS, A SOURCE OF STANDARD VOLTAGE WITH A RESISTOR CONNECTED THERETO, A DIODE ARRAY CONNECTED TO INTERMEDIATE POINTS IN SAID RESISTOR OF SUCCESSIVELY HIGHER VOLTAGE, A PLURALITY OF ELECTRONIC VALVES EACH HAVING A CONTROL ELECTRODE COUPLED TO ONE OF THE INPUT TERMINALS OF THE STANDARD VOLTAGE GENERATOR WITH AN ANODE CONNECTED TO ONE OF THE POINTS IN THE DIODE ARRAY, A PLURALITY OF BYPASS RESISTORS CONNECTED ACROSS SELECTED DIODES OF SAID ARRAY WHICH ARE CONNECTED TO POINTS ON THE RESISTOR OF HIGHER VOLTAGE, AN OUTPUT TERMINAL CONNECTED TO A POINT IN SAID RESISTOR WHEREBY AN OUTPUT VOLTAGE IS PRODUCED AT SAID OUTPUT TERMINALS HAVING A VALUE DETERMINED BY THE POTENTIAL RELATIONSHIPS BETWEEN THE INPUT TERMINALS OF THE STANDARD VOLTAGE GENERATOR, AN ERROR AMPLIFIER HAVING A PAIR OF INPUT TERMINALS FOR VOLTAGE COMPARISON, ONE OF WHICH IS CONNECTED TO THE OUTPUT TERMINAL OF THE STANDARD VOLTAGE GENERATOR AND THE OTHER OF WHICH IS COUPLED TO SAID INPUT SIGNAL TERMINALS FOR COMPARISON WITH AN ANALOG INPUT SIGNAL AND HAVING AN OUTPUT TERMINAL CONNECTED TO THE INPUT TERMINAL OF THE TRIGGER UNIT.